Displaying 1 result from an estimated 1 matches for "addlhsimm".
2012 Jan 14
0
[LLVMdev] TableGen: Avoid/Ignore the "no immediates on RHS of commutative node" constraint.
...with nested multiclasses, e.g.:
>>
>>
> If your target supports only additions with immediates in LHS, it is just
> an asm printing issue if I understand your problem correctly. You can just
> print out your immediate where you want it to be printed. For example:
>
> def ADDLHSImm: Instruction {
> let OutOperandList = (outs R:$dst);
> let InOperandList = (ins R:$src, i32imm:$b);
> let AsmString = "add $dst, $b, $src";
> let Pattern = (set R:$dst, (add R:$src, imm:$b);
> }
>
> Because "add" is commutative, the instruction selector...