search for: addhldisp

..."OR with 1" will work, but for second assigned :OR with 2" will not work. I suspect that llc is assuming that HL will contain 8 (that's the start) and or-ing 8 with 1 or with 2 is ok. But my HL has also added SP to it. This is how my ISD::FrameIndex instruction look like: def addHLdisp : Z80Instr<(outs HL16:$dst), (ins i16imm:$disp, GPR16:$src), "ld $dst, $disp\n\tadd $dst,$src", [(set HL16:$dst, (add GPR16:$src, (i16 imm:$disp)))]>; So it say that HL16:$dst wich is only HL register, will be changed. I also tried to change it to <(outs HL16:$dst), (ins i16im...

...for second assigned :OR with 2" will not > work. > > I suspect that llc is assuming that HL will contain 8 (that's the start) > and or-ing 8 with 1 or with 2 is ok. > But my HL has also added SP to it. > This is how my ISD::FrameIndex instruction look like: > > def addHLdisp : Z80Instr<(outs HL16:$dst), (ins i16imm:$disp, GPR16:$src), > "ld $dst, $disp\n\tadd $dst,$src", > [(set HL16:$dst, (add GPR16:$src, (i16 imm:$disp)))]>; > > So it say that HL16:$dst wich is only HL register, will be changed. > I also tried to change it to > <(...

...quot; will not >> work. >> >> I suspect that llc is assuming that HL will contain 8 (that's the start) >> and or-ing 8 with 1 or with 2 is ok. >> But my HL has also added SP to it. >> This is how my ISD::FrameIndex instruction look like: >> >> def addHLdisp : Z80Instr<(outs HL16:$dst), (ins i16imm:$disp, GPR16:$src), >> "ld $dst, $disp\n\tadd $dst,$src", >> [(set HL16:$dst, (add GPR16:$src, (i16 imm:$disp)))]>; >> >> So it say that HL16:$dst wich is only HL register, will be changed. >> I also tried to cha...