search for: addexpr

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2015 Mar 19
2
[LLVMdev] Cast to SCEVAddRecExpr
Hi Nick, Thanks for looking into it. I have tried that as well but it didn't worked. "AddExpr->getOperand(0))" node is: " (4 * (sext i32 {2,+,2}<%for.body4> to i64))<nsw>" When I cast this to "SCEVAddRecExpr" it returns NULL. Regards, Ashutosh -----Original Message----- From: Nick Lewycky [mailto:nicholas at mxc.ca] Sent: Thursday, March 19, 2015...
2015 Mar 19
3
[LLVMdev] Cast to SCEVAddRecExpr
...las at mxc.ca] Sent: Thursday, March 19, 2015 1:02 PM To: Nema, Ashutosh Cc: llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] Cast to SCEVAddRecExpr Nema, Ashutosh wrote: > Hi Nick, > > Thanks for looking into it. > > I have tried that as well but it didn't worked. > > "AddExpr->getOperand(0))" node is: > " (4 * (sext i32 {2,+,2}<%for.body4> to i64))<nsw>" > > When I cast this to "SCEVAddRecExpr" it returns NULL. Oh. Yeah, that's because it's a multiply with a 4 on the left. On the right is an sext, and if you gr...
2015 Mar 19
2
[LLVMdev] Cast to SCEVAddRecExpr
Hi, I'm trying to cast one of the SCEV node to "SCEVAddRecExpr". Every time cast return NULL, and I'm unable to do this. SCEV Node: ((4 * (sext i32 {2,+,2}<%for.body4> to i64))<nsw> + %var)<nsw> Casting: const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(SCEVNode); 'var' is of type float pointer (float*). Without 'sext' it works, but
2014 Apr 01
2
[LLVMdev] Construction of SCEVAddRecExpr
...identifies an expression as "SCEVAddRecExpr". Aren't the expressions below the kind of pattern that should be represented as a "AddRecExpr" ? SCEV: (1 + (2 * %3) or SCEV: (%1 + (2 * %3) or SCEV: (%1 + (%2 * %3) In my experiments they are always recognized as just "AddExpr" (not *Rec*). Can someone help me on this? What I'm misunderstanding here? I'm using the attached code to perform my experiments and this example as test input: int main() {     int vet1[100], i=0;     for (i=0; i<10; i++) {         vet1[3*i + 2] = vet1[i];     }     return 0;...
2016 Jun 22
2
x86: How to Force 2-byte `jmp` instruction in lowering
...Alignment(4); auto Target = OutContext.createLinkerPrivateTempSymbol(); // Use a two-byte `jmp`. This version of JMP takes an 8-bit relative offset as // an operand (computed as an offset from the jmp instruction). OutStreamer->EmitInstruction( MCInstBuilder(X86::JMP_1) .addExpr(MCSymbolRefExpr::create(Target, OutContext)), getSubtargetInfo()); EmitNops(*OutStreamer, 9, Subtarget->is64Bit(), getSubtargetInfo()); OutStreamer->EmitLabel(Target); Which turns into: .Lxray_sled_0: .palign 2, 0x90 jmp .Ltmp0 nopw 512(%rax,%rax,1) .Ltmp0: // rest of the...
2012 May 04
0
[LLVMdev] Extending GetElementPointer, or Premature Linearization Considered Harmful
...dd1411, i64 %add > store i64 0, i64* %arrayidx24, align 8 > {{{(5 + ((3 + %n) * %n)),+,(2 * %n * %n)}<%for.cond1.preheader>,+,(4 * %n)}<%for.cond4.preheader>,+,6}<%for.cond7.preheader> This expression is not straight forward because llvm always fold the loop invariant in the AddExpr into the AddRecExpr. If I understand the AddRecExpr correctly, the above SCEV is equivalent to: (5 + ((3 + %n) * %n)) + (2 * %n * %n) * {0,+,1}<%for.cond1.preheader> + (4 * %n) * {0,+,1}<%for.cond4.preheader> + 6 * {0,+,1}<%for.cond7.preheader> In the above example, you can treat...
2017 Jan 18
10
llvm is getting slower, January edition
...globals-aa by default. -1% 7. r248638: [SCEV] Reapply 'Teach isLoopBackedgeGuardedByCond to exploit trip counts'. +2% 8. r249802: [SCEV] Call `StrengthenNoWrapFlags` after `GroupByComplexity`; NFCI. +4% 9. r250157: [GlobalsAA] Turn GlobalsAA on again by default. +1% 10. r251049: [SCEV] Mark AddExprs as nsw or nuw if legal. +23% 11. No data 12. r259252: AttributeSetImpl: Summarize existing function attributes in a bitset. -1% r259256: Add LoopSimplifyCFG pass. -2% 13. r262250: Enable LoopLoadElimination by default. +3% 14. r262839: Revert "Enable LoopLoadElimination by default"....
2005 Aug 10
1
Issues with Canoo WebTest
...java:1213) [canoo] at org.mozilla.javascript.Parser.memberExpr (Parser.java:1204) [canoo] at org.mozilla.javascript.Parser.unaryExpr (Parser.java:1115) [canoo] at org.mozilla.javascript.Parser.mulExpr(Parser.java: 1062) [canoo] at org.mozilla.javascript.Parser.addExpr(Parser.java: 1045) [canoo] at org.mozilla.javascript.Parser.shiftExpr (Parser.java:1032) [canoo] at org.mozilla.javascript.Parser.relExpr(Parser.java: 1015) [canoo] at org.mozilla.javascript.Parser.eqExpr(Parser.java: 1002) [canoo] at org.mozilla.javascript.P...
2015 Mar 31
2
[LLVMdev] Cast to SCEVAddRecExpr
...PM > To: Nema, Ashutosh > Cc: llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] Cast to SCEVAddRecExpr > > Nema, Ashutosh wrote: >> Hi Nick, >> >> Thanks for looking into it. >> >> I have tried that as well but it didn't worked. >> >> "AddExpr->getOperand(0))" node is: >> " (4 * (sext i32 {2,+,2}<%for.body4> to i64))<nsw>" >> >> When I cast this to "SCEVAddRecExpr" it returns NULL. > > Oh. Yeah, that's because it's a multiply with a 4 on the left. On the > right...
2017 Jan 18
2
llvm is getting slower, January edition
...7. r248638: [SCEV] Reapply 'Teach isLoopBackedgeGuardedByCond to exploit trip counts'. +2% >> 8. r249802: [SCEV] Call `StrengthenNoWrapFlags` after `GroupByComplexity`; NFCI. +4% >> 9. r250157: [GlobalsAA] Turn GlobalsAA on again by default. +1% >> 10. r251049: [SCEV] Mark AddExprs as nsw or nuw if legal. +23% >> 11. No data >> 12. r259252: AttributeSetImpl: Summarize existing function attributes in a bitset. -1% >> r259256: Add LoopSimplifyCFG pass. -2% >> 13. r262250: Enable LoopLoadElimination by default. +3% >> 14. r262839: Revert "...
2017 Jan 20
2
llvm is getting slower, January edition
...SCEV] Reapply 'Teach isLoopBackedgeGuardedByCond to exploit > trip counts'. +2% > > 8. r249802: [SCEV] Call `StrengthenNoWrapFlags` after > `GroupByComplexity`; NFCI. +4% > > 9. r250157: [GlobalsAA] Turn GlobalsAA on again by default. +1% > > 10. r251049: [SCEV] Mark AddExprs as nsw or nuw if legal. +23% > > 11. No data > > 12. r259252: AttributeSetImpl: Summarize existing function attributes in > a bitset. -1% > > r259256: Add LoopSimplifyCFG pass. -2% > > 13. r262250: Enable LoopLoadElimination by default. +3% > > 14. r262839: Reve...
2012 May 04
3
[LLVMdev] Extending GetElementPointer, or Premature Linearization Considered Harmful
Is there any chance of replacing/extending the GEP instruction? As noted in the GEP FAQ, GEPs don't support variable-length arrays; when the front ends have to support VLAs, they linearize the subscript expressions, throwing away information. The FAQ suggests that folks interested in writing an analysis that understands array indices (I'm thinking of dependence analysis) should be
2020 Jul 26
2
[LAA] RtCheck on pointers of different address spaces.
...ge.html#address-spaces) With upstream compiler, the testcase fails with a crash (given at the end of the e-mail) in the opt while trying to generate the RT check for these pointers. Precisely, with two pointers of different address spaces. The operand type check fails while trying to insert a 'AddExpr' SCEV node as their effective type differs for these pointers (One with 32-bit and the other with 64-bit) Question: Is this intended to try for the RtCheck on pointers from different address spaces? The comments given in the code snippet (below) hints they aren't. Code...
2018 Sep 22
3
Quick question: How to BuildMI mov64mi32 arbitrary MMB address to memory
Dear Mr. Northover, Thank you for the quick reply. You are correct about the address-mode operands :) . I guess an important detail left out was that the basic block (call it A) that wants to calculate the address of the target stationary trampoline basic block (call it B) will be moved around in memory during run-time. Our earlier solution, before the feature was implemented to move around (A)
2020 Jul 26
2
[LAA] RtCheck on pointers of different address spaces.
...OI6A%3D&reserved=0>) With upstream compiler, the testcase fails with a crash (given at the end of the e-mail) in the opt while trying to generate the RT check for these pointers. Precisely, with two pointers of different address spaces. The operand type check fails while trying to insert a ‘AddExpr’ SCEV node as their effective type differs for these pointers (One with 32-bit and the other with 64-bit) Question: Is this intended to try for the RtCheck on pointers from different address spaces? The comments given in the code snippet (below) hints they aren’t. Code snippet...
2013 Nov 02
2
[LLVMdev] SCEV and GEP NSW flag
...id, I probably would not have written my e-mail), but applying it only to the 'address computation' itself. On the other hand, maybe that violates SCEV's general philosophy of being control-flow independent (maybe the logic that prohibits us from applying an add's nsw flag to an SCEVAddExpr should prohibit this as well). > > As an aside, you could still prove no-self-wrap for this recurrence. > If the base of the GEP is an NW recurrence (note that NSW or NUW > implies NW), the GEP itself is inbounds, and the GEP simplifies to a > recurrences, then I think you can infe...