search for: addeq

...l/llvm/projects/compiler-rt/lib/builtins/arm/clzsi2.S:33:2: error: unknown use of instruction mnemonic without a size suffix mov r1, 1 ^ /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/clzsi2.S:35:2: error: invalid instruction mnemonic 'lsrs' lsrs r2, r0, 16; movne r0, r2; addeq r1, 16 ^~~~ /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/clzsi2.S:35:19: error: invalid instruction mnemonic 'movne' lsrs r2, r0, 16; movne r0, r2; addeq r1, 16 ^~~~~ /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/clzsi2.S:35:33: error: inval...

I am currently trying to compile a pretty simple program to work on an experimental board. It contains an (FPGA-version of) an ARMv4 processor. So basically, I try this (on my Ubuntu 18.04.1 LTS): clang -v --target=arm-none-eabi -c barehello.c -o barehelloCLANG.o clang -v --target=arm-none-eabi -c io.c -o io.o clang -v --target=arm-none-eabi barehelloCLANG.o io.o -o helloCLANGstatic -static

...iltins/arm/clzsi2.S:33:2: error: unknown use of instruction mnemonic without a size suffix >> mov r1, 1 >> ^ >> /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/clzsi2.S:35:2: error: invalid instruction mnemonic 'lsrs' >> lsrs r2, r0, 16; movne r0, r2; addeq r1, 16 >> ^~~~ >> /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/clzsi2.S:35:19: error: invalid instruction mnemonic 'movne' >> lsrs r2, r0, 16; movne r0, r2; addeq r1, 16 >> ^~~~~ >> /home/llvm_all/llvm/projects/compiler-rt/li...

...iltins/arm/clzsi2.S:33:2: error: unknown use of instruction mnemonic without a size suffix >> mov r1, 1 >> ^ >> /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/clzsi2.S:35:2: error: invalid instruction mnemonic 'lsrs' >> lsrs r2, r0, 16; movne r0, r2; addeq r1, 16 >> ^~~~ >> /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/clzsi2.S:35:19: error: invalid instruction mnemonic 'movne' >> lsrs r2, r0, 16; movne r0, r2; addeq r1, 16 >> ^~~~~ >> /home/llvm_all/llvm/projects/compiler-rt/li...

...ltins/arm/clzsi2.S:33:2: error: unknown use of instruction mnemonic without a size suffix > > mov r1, 1 > > ^ > > /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/clzsi2.S:35:2: error: invalid instruction mnemonic 'lsrs' > > lsrs r2, r0, 16; movne r0, r2; addeq r1, 16 > > ^~~~ > > /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/clzsi2.S:35:19: error: invalid instruction mnemonic 'movne' > > lsrs r2, r0, 16; movne r0, r2; addeq r1, 16 > > ^~~~~ > > /home/llvm_all/llvm/projects/compiler-rt/...

...nown use of instruction mnemonic without a size suffix > >>> mov r1, 1 > >>> ^ > >>> /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/clzsi2.S:35:2: error: invalid instruction mnemonic 'lsrs' > >>> lsrs r2, r0, 16; movne r0, r2; addeq r1, 16 > >>> ^~~~ > >>> /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/clzsi2.S:35:19: error: invalid instruction mnemonic 'movne' > >>> lsrs r2, r0, 16; movne r0, r2; addeq r1, 16 > >>> ^~~~~ > >>&gt...

...mpiler-rt/lib/builtins/arm/clzsi2.S:33:2: error: unknown use of instruction mnemonic without a size suffix > mov r1, 1 > ^ > /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/clzsi2.S:35:2: error: invalid instruction mnemonic 'lsrs' > lsrs r2, r0, 16; movne r0, r2; addeq r1, 16 > ^~~~ > /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/clzsi2.S:35:19: error: invalid instruction mnemonic 'movne' > lsrs r2, r0, 16; movne r0, r2; addeq r1, 16 > ^~~~~ > /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/clzsi...

...e code for ARM backend. I noticed that the ARM Condition field( Bits 31-28) is generated by converting the conditions used in icmp and branch. For example, if I have following C Code int a,b,c,d; c = a+b; if(c==0) d = a + 10; Then I get ( Assembly Instructions with opcodes only) add *cmp* addeq ( basically converting branch to the predicate condition field) I have a few questions regarding the above operation. 1. If I use GCC on above code, then I get following .s output: adds addeq I don't get the intermediate compare instruction, which I got when I used LLVM. So, does LLV...

...mpiler-rt/lib/builtins/arm/clzsi2.S:33:2: error: unknown use of instruction mnemonic without a size suffix > mov r1, 1 > ^ > /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/clzsi2.S:35:2: error: invalid instruction mnemonic 'lsrs' > lsrs r2, r0, 16; movne r0, r2; addeq r1, 16 > ^~~~ > /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/clzsi2.S:35:19: error: invalid instruction mnemonic 'movne' > lsrs r2, r0, 16; movne r0, r2; addeq r1, 16 > ^~~~~ > /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/clzsi...

...28) is generated by converting the > conditions used in icmp and branch. For example, if I have following > C Code > > int a,b,c,d; > c = a+b; > > if(c==0) > d = a + 10; > > > Then I get ( Assembly Instructions with opcodes only) > > add > cmp > addeq > > > ( basically converting branch to the predicate condition field) > > I have a few questions regarding the above operation. > 1. If I use GCC on above code, then I get following .s output: > adds > addeq > > I don't get the intermediate compare instructi...

...its 31-28) is generated by converting the conditions used > in icmp and branch. For example, if I have following C Code > > int a,b,c,d; > c = a+b; > > if(c==0) > d = a + 10; > > > Then I get ( Assembly Instructions with opcodes only) > > add > *cmp* > addeq > > > ( basically converting branch to the predicate condition field) > > I have a few questions regarding the above operation. > 1. If I use GCC on above code, then I get following .s output: > adds > addeq > > I don't get the intermediate compare instructi...

...d in icmp and branch. For example, if I have >> following C Code >> >> int a,b,c,d; >> c = a+b; >> >> if(c==0) >> d = a + 10; >> >> >> Then I get ( Assembly Instructions with opcodes only) >> >> add >> cmp >> addeq >> >> >> ( basically converting branch to the predicate condition field) >> >> I have a few questions regarding the above operation. >> 1. If I use GCC on above code, then I get following .s output: >> adds >> addeq >> >> I don't...

...rs become available on FreeBSD. That's unfortunately not really the case, though. For example, all of the VFP instructions use newer mnemonics, and the predicated condition code setting arithmetic instructions have changed the order of the 's' and 'cc' suffices (e.g., addseq vs. addeqs). I suspect we'll care about all of them, as we're wanting to handle userspace apps, not just kernel code, here, right? This is the system assembler that's too old. If so, the best answer is to teach the assembler the new mnemonics. To help with that, the majority of the work for v7...

...rs become available on FreeBSD. That's unfortunately not really the case, though. For example, all of the VFP instructions use newer mnemonics, and the predicated condition code setting arithmetic instructions have changed the order of the 's' and 'cc' suffices (e.g., addseq vs. addeqs). > > I suspect we'll care about all of them, as we're wanting to handle userspace apps, not just kernel code, here, right? This is the system assembler that's too old. > > If so, the best answer is to teach the assembler the new mnemonics. To help with that, the majority...

...d >> in icmp and branch. For example, if I have following C Code >> >> int a,b,c,d; >> c = a+b; >> >> if(c==0) >> d = a + 10; >> >> >> Then I get ( Assembly Instructions with opcodes only) >> >> add >> *cmp* >> addeq >> >> >> ( basically converting branch to the predicate condition field) >> >> I have a few questions regarding the above operation. >> 1. If I use GCC on above code, then I get following .s output: >> adds >> addeq >> >> I don't...

On 22 June 2011 16:50, Jim Grosbach <grosbach at apple.com> wrote: >> This sounds like a dead end as newer binutils are GPLv3. > > Yeah, that's definitely a very real concern and a big motivation to get the MC based asm parser whipped into usable shape. We're much more in control of our own destiny then. So, how do we solve the problem until then? cheers, --renato

On Jun 22, 2011, at 8:39 AM, Damjan Marion wrote: > > On Jun 22, 2011, at 5:29 PM, Jim Grosbach wrote: > >> >> On Jun 22, 2011, at 7:22 AM, Renato Golin wrote: >> >>> On 22 June 2011 14:33, Damjan Marion <damjan.marion at gmail.com> wrote: >>>> Problem is that in case when old binutils are used (in my case freebsd is using old one due to

...rs become available on FreeBSD. That's unfortunately not really the case, though. For example, all of the VFP instructions use newer mnemonics, and the predicated condition code setting arithmetic instructions have changed the order of the 's' and 'cc' suffices (e.g., addseq vs. addeqs). >> >> I suspect we'll care about all of them, as we're wanting to handle userspace apps, not just kernel code, here, right? This is the system assembler that's too old. >> >> If so, the best answer is to teach the assembler the new mnemonics. To help with th...