search for: addend

...e location. If you ever find yourself applying relocations for a second time (for instance, because the loaded object location is remapped for out-of-proc execution) the original value is no longer in the loaded object. You could probably figure out a way to combine the placeholder value with the addend field, either while the relocation records are being built (though I’m not sure if the relevant sections have been loaded yet at that point) or the first time the relocation is applied (though it might be a bit cumbersome to know whether or not any given application was the first). -Andy From: L...

Hi all, I committed a first cut at blockless Givens/Whens/Thens to RSpec''s trunk: cd /path/to/rspec/project svn up cd rspec bin/spec examples/story/calculator.rb Take a look at examples/story/calculator.rb to see what''s going on. Needs docs!!!! Thoughts welcome. I''ve also got a cut at the plain text parser checked in, but it''s not hooked up to anything

...; 3925868544 = 0xea000000 > >> >> > >> >> Note the zeroes in the relocated data instead of 0xfffffe in the > >> >> original proposal. This is aligned with the way LLVM emits > relocations > >> >> in the backend, and avoids encoding the addend in a > >> >> relocation-specific way in the IR. > >> > > >> > > >> > I am confused by this statement. If the zeros aren't what appear in > the > >> > object file, it seems rather relocation specific to me. > >> > >...

On Sun, Nov 22, 2015 at 1:28 AM, Rui Ueyama <ruiu at google.com> wrote: > I'm not sure if I understand the semantics of HI16 and LO16 relocations. If > my understanding is correct, a pair of HI16 and LO16 represents an addend > AHL. AHL is computed by (AHI<<16) | (ALO&0xFFFF). Can't we apply HI16 and > LO16 relocations separately and produce the same relocation result? Do we > have to pair them up before applying relocations? The correct formula for the combined addend is (AHI << 16) + (sho...

Hi, Now in case of relocatable object generation LLD merges and copies REL/RELA sections as is and does not touch any addends. But it is incorrect. If we have a relocation which targets a section, we have to adjust the relocation's addend to take in account that the section might be merged with other ones. Here is the reproduction script: % cat t1.s .data .long 0 .text bar: movl $1, .data % cat t2.s .dat...

...; 29 = 0x1d = R_ARM_JUMP24 > >> ; 3925868544 = 0xea000000 > >> > >> Note the zeroes in the relocated data instead of 0xfffffe in the > >> original proposal. This is aligned with the way LLVM emits relocations > >> in the backend, and avoids encoding the addend in a > >> relocation-specific way in the IR. > > > > > > I am confused by this statement. If the zeros aren't what appear in the > > object file, it seems rather relocation specific to me. > > These bytes will always be zeroes, which makes them not relocat...

...:46 PM, Peter Smith <peter.smith at linaro.org> wrote: > Hello Simon, > > Can I just check something with you? When I tried the example the > .data section symbols given in the llvm-readelf -r output are > different, one has an offset of 0 and one has an offset of 4 so the > addends don't need updating. In ld the section symbols both have the > same offset of 0 so the addends need updating. So I think the two > approaches are equivalent. > > Have I misunderstood? > > Peter > > On 27 September 2016 at 08:28, Simon Atanasyan via llvm-dev > <llv...

Hi, Do you have ideas, how to find all those different combinations of integers (>0) that produce as a sum, a certain integer. i.e.: if that sum is 3, the possibilities are c(1,1,1), c(1,2), c(2,1) 4, the possibilities are c(1,1,1,1),c(1,1,2),c(1,2,1),c(2,1,1),c(2,2),c(1,3),c(3,1) etc. Best regards, Atte Tenkanen

...i32 reloc (29, void ()* @f, 3925868544) > ; 29 = 0x1d = R_ARM_JUMP24 > ; 3925868544 = 0xea000000 > > Note the zeroes in the relocated data instead of 0xfffffe in the > original proposal. This is aligned with the way LLVM emits relocations > in the backend, and avoids encoding the addend in a > relocation-specific way in the IR. I am confused by this statement. If the zeros aren't what appear in the object file, it seems rather relocation specific to me. > Instead, the addend can be > specified in the second argument with the regular IR expressions, like > the f...

Hi, I am working on support R_MIPS_HI16 / R_MIPS_LO16 in the new LLD and have a couple of questions. == Q1 In case of MIPS O32 ABI we have to find a matching R_MIPS_LO16 relocation to calculate R_MIPS_HI16 one because R_MIPS_HI16 uses combined addend (AHI << 16) + (short)ALO where AHI is original R_MIPS_HI16 addend and ALO is addend of the matching R_MIPS_LO16 relocation [1]. There are two methods to do matching and R_MIPS_HI16 calculation. Method A: 1. Postpone R_MIPS_HI16 relocation calculation and record its arguments. 2. When R_MIPS_...

...20, 2015 at 10:13 PM, Simon Atanasyan <simon at atanasyan.com> >> > wrote: >> >> >> >> In case of MIPS O32 ABI we have to find a matching R_MIPS_LO16 >> >> relocation to calculate R_MIPS_HI16 one because R_MIPS_HI16 uses >> >> combined addend (AHI << 16) + (short)ALO where AHI is original >> >> R_MIPS_HI16 addend and ALO is addend of the matching R_MIPS_LO16 >> >> relocation [1]. There are two methods to do matching and R_MIPS_HI16 >> >> calculation. >> >> >> >> Method A:...

...uiu at google.com> wrote: > On Fri, Nov 20, 2015 at 10:13 PM, Simon Atanasyan <simon at atanasyan.com> > wrote: >> >> In case of MIPS O32 ABI we have to find a matching R_MIPS_LO16 >> relocation to calculate R_MIPS_HI16 one because R_MIPS_HI16 uses >> combined addend (AHI << 16) + (short)ALO where AHI is original >> R_MIPS_HI16 addend and ALO is addend of the matching R_MIPS_LO16 >> relocation [1]. There are two methods to do matching and R_MIPS_HI16 >> calculation. >> >> Method A: >> 1. Postpone R_MIPS_HI16 relocation...

...from different sources. Usually we setup it using constant offset from the .got section. Also it might be defined by a linker script. And in rare but possible case it comes from .reginfo / .MIPS.options sections. Got example, GNU bfd linker has the following code to adjust _gp-relative relocation addends: rel->r_addend += _bfd_get_gp_value (input_bfd); rel->r_addend -= _bfd_get_gp_value (output_bfd); But I think we can escape to implement the same adjustments in LLD if we do not support non-zero gp-value in the .reginfo / .MIPS.options sections in input object files. We can get such file...

Hi all, Working on lld aarch64 support I came across an issue where I am not sure which would be best design approach to solve. The aarch64 R_AARCH64_ABS64 relocation for PIC/PIE build requires a dynamic relocation (R_AARCH64_RELATIVE) with the value set as the addend of the relocation. For instance, when linking the crtbeginS.o which contains: Relocation section '.rela.init_array' at offset 0xd28 contains 1 entries: Offset Info Type Sym. Value Sym. Name + Addend 000000000000 000200000101 R_AARCH64_ABS64 0000000000...

...ode (a buggy --gc- > >> > > > sections implementation can trigger this as well) > >> > > > * a relocation referencing an undefined symbol in a non-SHF_ALLOC > >> > section > >> > > > > >> > > > We always respect the addend in a relocation entry for an absolute/PC- > >> > > > relative (I can use "most" here) > >> > > > relocation (R_ARM_THM_PC8, R_AARCH64_ADR_PREL_PG_HI21, R_X86_64_64, > >> > > > local exec TLS relocation types, ...) > >> > &g...

...ion. It exist, however, a group section relocation with same offset, but for a different text segments (the exception handler stub create by clang): Relocation section '.rela.text' at offset 0xed8 contains 2 entries: Offset Info Type Sym. Value Sym. Name + Addend 000000000010 00480000011b R_AARCH64_CALL26 0000000000000000 _ZNSt9exceptionD2Ev + 0 000000000020 004d0000011a R_AARCH64_JUMP26 0000000000000000 _ZdlPv + 0 Relocation section '.rela.text' at offset 0xf08 contains 2 entries: Offset Info Type Sym. Value S...

...; > > sections implementation can trigger this as well) > >> >> > > > * a relocation referencing an undefined symbol in a non-SHF_ALLOC > >> >> > section > >> >> > > > > >> >> > > > We always respect the addend in a relocation entry for an absolute/PC- > >> >> > > > relative (I can use "most" here) > >> >> > > > relocation (R_ARM_THM_PC8, R_AARCH64_ADR_PREL_PG_HI21, R_X86_64_64, > >> >> > > > local exec TLS relocation types,...

...> > on ARM has specific semantics to implement ARM/Thumb interworking; see > > http://infocenter.arm.com/help/topic/com.arm.doc.ihi0044e/IHI0044E_aaelf.pdf > > Note that R_ARM_CALL has the same operation but different semantics. > > I suppose that we could try looking at the addend to decide which relocation > > to use, but this would mean adding more complexity to the assembler (along > > with any pattern matching that would need to be done). It seems simpler, > > both conceptually and in the implementation, for the client to directly say > > what it...

...$0xe,%edi 26: e8 00 00 00 00 callq 2b <_Z4funcj+0x2b> As for aarch64, x86_64 object shows some relocation in group sections: Relocation section '.rela.text' at offset 0xb48 contains 2 entries: Offset Info Type Sym. Value Sym. Name + Addend 000000000005 003200000002 R_X86_64_PC32 0000000000000000 _ZNSt9exceptionD2Ev - 4 00000000000e 003700000002 R_X86_64_PC32 0000000000000000 _ZdlPv - 4 That should me meant only for the group section text, not the default text segment. On 06-05-2015 18:18, Shankar Easwaran wrote: > Doe...

...t; #include "llvm/Support/DataTypes.h" > #include "llvm/Support/ELF.h" > +#include <vector> > > namespace llvm { > class MCELFObjectTargetWriter { > @@ -27,6 +28,33 @@ protected: > uint16_t EMachine_, bool HasRelocationAddend_); > > public: > + /// @name Relocation Data > + /// @{ > + > + struct ELFRelocationEntry { > + // Make these big enough for both 32-bit and 64-bit > + uint64_t r_offset; > + int Index; > + unsigned Type; > + const MCSymbol *Symbol; > + ui...