Displaying 5 results from an estimated 5 matches for "adddirectmem".
2004 Dec 02
3
[LLVMdev] Adding xadd instruction to X86
...lvm.atomic_fetch_add_store(<integer type>* <pointer>,
<integer type> <value>)
I currently have the following code (PtrReg contains the
pointer argument, ValReg the value arg, and TmpReg an unused
register.):
addDirectMem(BuildMI(BB, X86::XADD32mr, 4,
TmpReg).addReg(TwoReg), ValReg);
This fails the assertion isMem. Any help with this would be
appreciated.
Thanks,
Brent
2004 Dec 02
0
[LLVMdev] Adding xadd instruction to X86
...t;integer type>)*
> %llvm.atomic_fetch_add_store(<integer type>* <pointer>,
>
> <integer type> <value>)
>
> I currently have the following code (PtrReg contains the
> pointer argument, ValReg the value arg, and TmpReg an unused
> register.):
>
> addDirectMem(BuildMI(BB, X86::XADD32mr, 4,
> TmpReg).addReg(TwoReg), ValReg);
This is the problem. Try this:
addDirectMem(BuildMI(BB, X86::XADD32mr, 4, TmpReg), ValReg).addReg(TwoReg);
In particular, you want to add the memory address before the other reg.
Another problem though, is that (without lookin...
2004 Dec 03
2
[LLVMdev] Adding xadd instruction to X86
...llvm.atomic_fetch_add_store(<integer type>* <pointer>,
>>
>><integer type> <value>)
>>
>>I currently have the following code (PtrReg contains the
>>pointer argument, ValReg the value arg, and TmpReg an unused
>>register.):
>>
>>addDirectMem(BuildMI(BB, X86::XADD32mr, 4,
>>TmpReg).addReg(TwoReg), ValReg);
>
>
> This is the problem. Try this:
> addDirectMem(BuildMI(BB, X86::XADD32mr, 4, TmpReg), ValReg).addReg(TwoReg);
>
> In particular, you want to add the memory address before the other reg.
>
> Ano...
2018 Jun 26
2
MachineFunction Instructions Pass using Segment Registers
...;
> >::const_reference = const llvm::MCOperand&;
> llvm::SmallVectorTemplateCommon<T, <template-parameter-1-2>
> >::size_type = long unsigned int]: Assertion `idx < size()' failed.
>
> I saw this function in the code base but not sure what it does
> "addDirectMem(MachineInstructionBuilder_thing, register you want to
> use);"
>
>
> This is be the last bit of information I think I need to finish up
> this implementation. Thanks again for your help!
>
> Sincerely,
>
> Chris Jelesnianski
>
> On Sat, Jun 23, 2018 at 11:32 PM...
2018 Jun 24
2
MachineFunction Instructions Pass using Segment Registers
The size suffix thing is a weird quirk in our assembler I should look into
fixing. Instructions in at&t syntax usually have a size suffix that is
often optional
For example:
add %ax, %bx
and
addw %ax, %bx
Are equivalent because the register name indicates the size.
but for an instruction like this
addw $1, (%ax)
There is nothing to infer the size from so an explicit suffix is