Displaying 4 results from an estimated 4 matches for "add_i32".
2009 Feb 10
2
[LLVMdev] Multiclass patterns
...s inside of a multiclass to
reduce redundant code.
For example:
multiclass IntSubtract<SDNode node>
{
def _i8 : Pat<(sub GPRI8:$src0, GPRI8:$src1),
(ADD_i8 GPRI8:$src0, (NEGATE_i8 GPRI8:$src1))>;
def _i32 : Pat<(sub GPRI32:$src0, GPRI32:$src1),
(ADD_i32 GPRI32:$src0, (NEGATE_i32 GPRI32:$src1))>;
}
or something similar.
I just want to write the pattern once and then have it apply to multiple
register types, i.e. a generic pattern rule for many different register
classes.
Thanks,
Micah
-----Original Message-----
From: llvmdev-bounces at cs.uiu...
2009 Feb 10
0
[LLVMdev] Multiclass patterns
...duce redundant code.
> For example:
> multiclass IntSubtract<SDNode node>
> {
> def _i8 : Pat<(sub GPRI8:$src0, GPRI8:$src1),
> (ADD_i8 GPRI8:$src0, (NEGATE_i8 GPRI8:$src1))>;
> def _i32 : Pat<(sub GPRI32:$src0, GPRI32:$src1),
> (ADD_i32 GPRI32:$src0, (NEGATE_i32 GPRI32:$src1))>;
> }
>
> or something similar.
> I just want to write the pattern once and then have it apply to multiple
> register types, i.e. a generic pattern rule for many different register
> classes.
>
Please look at the documentation for &qu...
2009 Feb 10
2
[LLVMdev] Multiclass patterns
Is there a way to define a multi-class pattern in tablegen?
Thanks,
Micah Villmow
Systems Engineer
Advanced Technology & Performance
Advanced Micro Devices Inc.
S1-609 One AMD Place
Sunnyvale, CA. 94085
P: 408-749-3966
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2009 Feb 10
0
[LLVMdev] Multiclass patterns
On Mon, Feb 9, 2009 at 5:17 PM, Villmow, Micah <Micah.Villmow at amd.com> wrote:
> Is there a way to define a multi-class pattern in tablegen?
>
Yes. See "multiclass" and "defm" in, say, X86Instr64bit.td, et al.
-bw