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2009 Feb 13
3
[LLVMdev] Modeling GPU vector registers, again (with my implementation)
...ew value, and store the result of shufflevector.
Input assembly language:
mul r0.xy, r1, r2
add r0.zw, r3, r4
sub r5, r0, r1
is converted to LLVM IR:
%r0 = alloca <4 x float>
%mul_1 = mul <4 x float> %r1, %r2
store <4 x float> %mul_1, <4 x float>* %r0
...
%add_1 = add <4 x float> %r3, %r4
; a store does not immediately happen here
%load_1 = load <4 x float>* %r0
; select the first two elements from the existing value,
; the last two elements from the newly generated value
%merge_1 = shufflevector <4 x float> %load_1,...
2009 Feb 13
0
[LLVMdev] Modeling GPU vector registers, again (with my implementation)
...ut assembly language:
> mul r0.xy, r1, r2
> add r0.zw, r3, r4
> sub r5, r0, r1
>
> is converted to LLVM IR:
>
> %r0 = alloca <4 x float>
> %mul_1 = mul <4 x float> %r1, %r2
> store <4 x float> %mul_1, <4 x float>* %r0
> ...
> %add_1 = add <4 x float> %r3, %r4
> ; a store does not immediately happen here
> %load_1 = load <4 x float>* %r0
>
> ; select the first two elements from the existing value,
> ; the last two elements from the newly generated value
> %merge_1 = shufflevector <4 x...