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...will happily move a machine instruction into a following machine basic block (not necessarily a successor), even when that later block can be reached through a setjmp. Here is some example debug output from llc that I'm seeing: Sinking along critical edge. Sink instr %vreg8<def,tied1> = ADD64rr %vreg14<tied0>, %vreg31, %EFLAGS<imp-def,dead>; GR64:%vreg8,%vreg14,%vreg31 into block BB#11: Predecessors according to CFG: BB#8 BB#10 BB#32 ... EH_SjLj_Setup <BB#36>, <regmask> Successors according to CFG: BB#34 BB#36 Sinking along critical edge. S...

...ith running llvm-exegesis tool on x86_64? I saw that I need libpfm library, but I'm still getting segmentation fault when I try to run the tool. Is there anything else I need to do (build llvm on some specific way) ? This is how I tried to run this tool: llvm-exegesis -mode=latency -opcode-name=ADD64rr Thanks, Luka -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180814/81ec44bd/attachment.html>

...;s a sequence of instructions that looks like this before linear scan: ##### 2800 %reg1591<def> = SUB64rr %reg1591, %reg1589, %EFLAGS<imp-def,dead> ; srcLine 0 2808 %reg1591<def> = IMUL64rr %reg1591, %reg1055, %EFLAGS<imp-def,dead> ; srcLine 0 2816 %reg1591<def> = ADD64rr %reg1591, %reg1579, %EFLAGS<imp-def,dead> ; srcLine 0 2820 %reg1198<def> = LEA64r %reg1591, 1, %reg1574, 0 ; srcLine 0 ##### %reg1591 gets spilled by linear scan with all of the uses in the sequence above reused by the "spltting" code in LiveIntervals. Note especially th...

...is irrelevant to the problem, but makes the graph clearer. The loop body produces the following SelectionDAG: http://i.imgur.com/tmJBZ.png The JNE_4 near the root of the graph depends on the flag produced by the DEC64_32r, through a CopyToReg node. Other nodes that write to the flags, such as the ADD64rr nodes on the left are not linked to the DEC64_32rr node with a WAW edge. I'm assuming that this is because they are not hardcoded to output to EFLAGS, but rather to a virtual register, and the aforementioned CopyToReg node takes the virtual output from DEC64_32rr and puts it in EFLAGS. The Sel...