search for: add6

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2011 Jul 05
3
[LLVMdev] optimizer returning wrong variable?
...epeat1 Repeat1: ; preds = %Until1, % Entry store i32 0, i32* %y br label %Repeat2 Repeat2: ; preds = %Until2, % Repeat1 %x3 = load i32* %x %y4 = load i32* %y %add = add i32 %x3, %y4 %c5 = load i32* %c %add6 = add i32 %c5, %add store i32 %add6, i32* %c %y7 = load i32* %y %add8 = add i32 %y7, 1 store i32 %add8, i32* %y br label %Until2 Until2: ; preds = %Repeat2 %y9 = load i32* %y %b10 = load i32* %b2 %cond = icmp sge i32 %y9, %b10 br i1 %cond...
2011 Jul 05
0
[LLVMdev] optimizer returning wrong variable?
...c interface it looks ok to me > but the optimizer is returning the wrong variable > I don't know what to do to avoid it? I don't see the problem. In your input .ll, the function's return is: %c16 = load i32* %c ret i32 %c16 The last store to %c is the one in Repeat2 %add6 = add i32 %c, %add store i32 %add6, i32* %c which postdominates (ie., all routes from entry to exit must encounter that store). Therefore we conclude that the return value is in fact %add6. Are you actually seeing different behaviour for any particular set of inputs on some target? Nick &g...
2016 Sep 16
2
SCEV cannot compute the trip count of Simple loop
...; preds = %for.body, %entry %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ %1, %entry ] %arrayidx5 = getelementptr inbounds [6 x [6 x [6 x i32]]], [6 x [6 x [6 x i32]]]* %mat, i64 0, i64 %idxprom3, i64 %indvars.iv, i64 1 %3 = load i32, i32* %arrayidx5, align 4, !tbaa !1 %add6 = add nsw i32 %3, 5 store i32 %add6, i32* %arrayidx5, align 4, !tbaa !1 %indvars.iv.next = add nsw i64 %indvars.iv, 1 %cmp = icmp slt i64 %indvars.iv, %2 br i1 %cmp, label %for.body, label %for.end for.end: ; preds = %for.body call void @llvm.life...
2016 Sep 16
3
SCEV cannot compute the trip count of Simple loop
...; preds = %for.body, %entry %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ %1, %entry ] %arrayidx5 = getelementptr inbounds [6 x [6 x [6 x i32]]], [6 x [6 x [6 x i32]]]* %mat, i64 0, i64 %idxprom3, i64 %indvars.iv, i64 1 %3 = load i32, i32* %arrayidx5, align 4, !tbaa !1 %add6 = add nsw i32 %3, 5 store i32 %add6, i32* %arrayidx5, align 4, !tbaa !1 %indvars.iv.next = add nsw i64 %indvars.iv, 1 %cmp = icmp slt i64 %indvars.iv, %2 br i1 %cmp, label %for.body, label %for.end for.end: ; preds = %for.body call void @llvm.life...
2016 Apr 08
2
LIBCLC with LLVM 3.9 Trunk
It's not clear what is actually wrong from your original message, I think you need to give some more information as to what you are doing: Example source, what target GPU, compiler error messages or other evidence of "it's wrong" (llvm IR, disassembly, etc) ... -- Mats On 8 April 2016 at 09:55, Liu Xin via llvm-dev <llvm-dev at lists.llvm.org> wrote: > I built it
2017 Sep 13
2
RFC phantom memory intrinsic
...ign 8 %vecinit2 = insertelement <4 x double> %vecinit, double %1, i32 1 %add3 = add i64 %i, 2 %arrayidx4 = getelementptr inbounds double, double* %ptr, i64 %add3 %2 = load double, double* %arrayidx4, align 8 %vecinit5 = insertelement <4 x double> %vecinit2, double %2, i32 2 %add6 = add i64 %i, 3 %arrayidx7 = getelementptr inbounds double, double* %ptr, i64 %add6 %3 = load double, double* %arrayidx7, align 8 %vecinit8 = insertelement <4 x double> %vecinit5, double %3, i32 3 %shuffle = shufflevector <4 x double> %vecinit8, <4 x double> %vecinit8, &lt...
2017 Sep 13
2
RFC phantom memory intrinsic
...t; %vecinit, double %1, i32 1 >> %add3 = add i64 %i, 2 >> %arrayidx4 = getelementptr inbounds double, double* %ptr, i64 %add3 >> %2 = load double, double* %arrayidx4, align 8 >> %vecinit5 = insertelement <4 x double> %vecinit2, double %2, i32 2 >> %add6 = add i64 %i, 3 >> %arrayidx7 = getelementptr inbounds double, double* %ptr, i64 %add6 >> %3 = load double, double* %arrayidx7, align 8 >> %vecinit8 = insertelement <4 x double> %vecinit5, double %3, i32 3 >> %shuffle = shufflevector <4 x double> %vec...
2012 Jul 16
0
[LLVMdev] !dbg metadata not generated for if.else->if.end branch
...%result, align 4, !dbg !51 br label %if.end, !dbg !51 if.else: ; preds = %entry %6 = load i8* %bar.addr, align 1, !dbg !52 %conv4 = sext i8 %6 to i32, !dbg !52 %sub5 = sub nsw i32 221, %conv4, !dbg !52 %7 = load i32* %result, align 4, !dbg !52 %add6 = add nsw i32 %7, %sub5, !dbg !52 store i32 %add6, i32* %result, align 4, !dbg !52 br label %if.end if.end: ; preds = %if.else, %if.then %8 = load i32* %result, align 4, !dbg !53 ---- Note that for the branch from if.else to if.end (br label %if.en...
2017 Sep 26
0
RFC phantom memory intrinsic
...32 1 >>> %add3 = add i64 %i, 2 >>> %arrayidx4 = getelementptr inbounds double, double* %ptr, i64 %add3 >>> %2 = load double, double* %arrayidx4, align 8 >>> %vecinit5 = insertelement <4 x double> %vecinit2, double %2, i32 2 >>> %add6 = add i64 %i, 3 >>> %arrayidx7 = getelementptr inbounds double, double* %ptr, i64 %add6 >>> %3 = load double, double* %arrayidx7, align 8 >>> %vecinit8 = insertelement <4 x double> %vecinit5, double %3, i32 3 >>> %shuffle = shufflevector &lt...
2009 Apr 20
4
[LLVMdev] Unnecessary moves after sign-extension in 2-address target
...;i8> [#uses=1] %conv1 = sext i8 %conv to i32 ; <i32> [#uses=1] %conv3 = trunc i32 %b to i16 ; <i16> [#uses=1] %conv4 = sext i16 %conv3 to i32 ; <i32> [#uses=1] %add = add i32 %conv1, %c ; <i32> [#uses=1] %add6 = add i32 %add, %conv4 ; <i32> [#uses=1] ret i32 %add6 } And this not-so-great assembler code: sext: sextb r1 mov r4,r1 ### unnecessary move add r4,r3 sextw r2 mov r1,r2 ### unnecessary move add r1,r4 jmp [r30] Which should be this: se...
2017 Feb 13
2
RFC: Representing unions in TBAA
...lementptr inbounds (%struct.Q, %struct.Q* @q, i32 0, i32 1, i32 0), align 4, !tbaa !2 %conv4 = sitofp i32 %5 to float %add5 = fadd float %add3, %conv4 %6 = load float, float* bitcast (%union.U* getelementptr inbounds (%struct.Q, %struct.Q* @q, i32 0, i32 1) to float*), align 4, !tbaa !11 %add6 = fadd float %add5, %6 %7 = load i32, i32* getelementptr inbounds (%struct.Q, %struct.Q* @q, i32 0, i32 0), align 4, !tbaa !13 %conv7 = sitofp i32 %7 to float %add8 = fadd float %add6, %conv7 %8 = load i32, i32* getelementptr inbounds (%struct.R, %struct.R* @r, i32 0, i32 1), align 4, !tb...
2017 Sep 26
2
RFC phantom memory intrinsic
...; %add3 = add i64 %i, 2 >>>> %arrayidx4 = getelementptr inbounds double, double* %ptr, i64 %add3 >>>> %2 = load double, double* %arrayidx4, align 8 >>>> %vecinit5 = insertelement <4 x double> %vecinit2, double %2, i32 2 >>>> %add6 = add i64 %i, 3 >>>> %arrayidx7 = getelementptr inbounds double, double* %ptr, i64 %add6 >>>> %3 = load double, double* %arrayidx7, align 8 >>>> %vecinit8 = insertelement <4 x double> %vecinit5, double %3, i32 3 >>>> %shuffle = s...
2017 Sep 26
0
RFC phantom memory intrinsic
...4 %i, 2 >>>>> %arrayidx4 = getelementptr inbounds double, double* %ptr, i64 %add3 >>>>> %2 = load double, double* %arrayidx4, align 8 >>>>> %vecinit5 = insertelement <4 x double> %vecinit2, double %2, i32 2 >>>>> %add6 = add i64 %i, 3 >>>>> %arrayidx7 = getelementptr inbounds double, double* %ptr, i64 %add6 >>>>> %3 = load double, double* %arrayidx7, align 8 >>>>> %vecinit8 = insertelement <4 x double> %vecinit5, double %3, i32 3 >>>>&g...
2017 Sep 12
3
RFC phantom memory intrinsic
Hi, For PR21780 solution, I plan to add a new functionality to restore memory operations that was once deleted, in this particular case it is the load operations that were deleted by InstCombine, please note that once the load was removed there is no way to restore it back and that prevents us from vectorizing the shuffle operation. There are probably more similar issues where this approach could
2012 Nov 11
2
[LLVMdev] problem trying to write an LLVM register-allocation pass
Hi Susan, It looks like the bitcode you have attached is corrupted. You should make sure to attach it as a binary file. Alternatively you can attach the LLVM assembly as text. You can generate an assembly file from bitcode with: llvm-dis -o <asm file> <bitcode> Regards, Lang. On Fri, Nov 9, 2012 at 11:15 AM, Susan Horwitz <horwitz at cs.wisc.edu> wrote: > Thanks Lang,
2012 Nov 11
0
[LLVMdev] problem trying to write an LLVM register-allocation pass
...d %call2 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), i32 %x.0) %add = add nsw i32 %x.0, 5 %mul = mul nsw i32 %x.0, 2 %sub = sub nsw i32 %mul, 1 %mul3 = mul nsw i32 %add, %sub %add4 = add nsw i32 %x.0, %mul3 %div5 = sdiv i32 %add4, %x.0 %add6 = add nsw i32 5, %add %sub7 = sub nsw i32 %div5, %add6 %add8 = add nsw i32 %add4, %sub7 %add9 = add nsw i32 %add8, %x.0 %add10 = add nsw i32 %add9, %add %add11 = add nsw i32 %add10, %sub %call12 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([37 x i8]* @.str1, i32 0, i32 0),...