search for: add32

Displaying 20 results from an estimated 67 matches for "add32".

2007 Aug 24
1
Speex on ARM7
...T. Unfortunately the encoding speed is about 5 times slower then necessary for real time. ARM7 is slow for 16/8 bits operations. The sequence: static inline spx_word32_t compute_pitch_error(spx_word16_t *C, spx_word16_t *g, spx_word16_t pitch_control) { spx_word32_t sum = 0; sum = ADD32(sum,MULT16_16(MULT16_16_16(g[0],pitch_control),C[0])); sum = ADD32(sum,MULT16_16(MULT16_16_16(g[1],pitch_control),C[1])); sum = ADD32(sum,MULT16_16(MULT16_16_16(g[2],pitch_control),C[2])); sum = SUB32(sum,MULT16_16(MULT16_16_16(g[0],g[1]),C[3])); sum = SUB32(sum,MULT16_16(MULT16_16_...
2015 Nov 16
0
[Fast Int64 2/4] Add OPUS_FAST_INT64 flavors of celt/fixed_generic.h macros.
..._16SU(a,b) ((opus_val32)(opus_val16)(a)*(opus_val32)(opus_uint16)(b)) /** 16x32 multiplication, followed by a 16-bit shift right. Results fits in 32 bits */ +#if OPUS_FAST_INT64 +#define MULT16_32_Q16(a,b) ((opus_val32)SHR((opus_int64)((opus_val16)(a))*(b),16)) +#else #define MULT16_32_Q16(a,b) ADD32(MULT16_16((a),SHR((b),16)), SHR(MULT16_16SU((a),((b)&0x0000ffff)),16)) +#endif /** 16x32 multiplication, followed by a 16-bit shift right (round-to-nearest). Results fits in 32 bits */ +#if OPUS_FAST_INT64 +#define MULT16_32_P16(a,b) ((opus_val32)PSHR((opus_int64)((opus_val16)(a))*(b),16)) +...
2007 Aug 29
2
high-pass filter issues
...0.96723f}, {0.98645f, -1.97277f, 0.98645f}, {0.88000f, -1.76000f, 0.88000f}}; #endif const spx_word16_t *den, *num; if (filtID>4) filtID=4; den = Pcoef[filtID]; num = Zcoef[filtID]; /*return;*/ for (i=0;i<len;i++) { spx_word16_t yi; spx_word32_t vout = ADD32(MULT16_16(num[0], x[i]),mem[0]); yi = EXTRACT16(SATURATE(PSHR32(vout,14),32767)); mem[0] = ADD32(MAC16_16(mem[1], num[1],x[i]), SHL32(MULT16_32_Q15(-den[1],vout),1)); mem[1] = ADD32(MULT16_16(num[2],x[i]), SHL32(MULT16_32_Q15(-den[2],vout),1)); y[i] = yi; } } I can st...
2015 Nov 16
3
[Fast Int64 1/4] Move OPUS_FAST_INT64 definition to celt/arch.h.
...| 5 +++++ silk/macros.h | 4 +--- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/celt/arch.h b/celt/arch.h index 9f74ddd..670527b 100644 --- a/celt/arch.h +++ b/celt/arch.h @@ -78,6 +78,11 @@ static OPUS_INLINE void _celt_fatal(const char *str, const char *file, int line) #define UADD32(a,b) ((a)+(b)) #define USUB32(a,b) ((a)-(b)) +/* Set this if opus_int64 is a native type of the CPU. */ +/* Assume that all LP64 architectures have fast 64-bit types; also x86_64 (which can be ILP32 for x32) + and Win64 (which is LLP64). */ +#define OPUS_FAST_INT64 (defined(__LP64__) || define...
2005 May 25
3
Speex on TI C6x, Problem with TI C5x Patch
...#define PSHR16(a,shift) (a) #define PSHR32(a,shift) (a) #define SATURATE16(x,a) (x) #define SATURATE32(x,a) (x) #define PSHR(a,shift) (a) #define SHR(a,shift) (a) #define SHL(a,shift) (a) #define SATURATE(x,a) (x) #define ADD16(a,b) ((a)+(b)) #define SUB16(a,b) ((a)-(b)) #define ADD32(a,b) ((a)+(b)) #define SUB32(a,b) ((a)-(b)) #define ADD64(a,b) ((a)+(b)) #define MULT16_16_16(a,b) ((a)*(b)) #define MULT16_16(a,b) ((spx_word32_t)(a)*(spx_word32_t)(b)) #define MAC16_16(c,a,b) ((c)+(spx_word32_t)(a)*(spx_word32_t)(b)) #define MULT16_32_Q11(a,b) ((a)*(b)) #define M...
2005 Nov 05
2
Noisy sound quality with Blackfin in WB-mode
Hello Jean-Marc, > Got any luck with the Blackfin stuff? One thing I forgot mentioning that > would probably help a lot in narrowing down the bug is to simply disable > assembly functions one by one and see which one breaks Speex. sorry that I didn't reply for some days. Unfortunately I had some other serious problems with my software which are not related to Speex. I hope to solve
2009 Dec 21
0
Fwd: Fixed Point on wideband-mode: Single Frame loss on 2000 Hz sine causes "freak off"
An update: I found that the "ADD32: output is not int:" messages are caused by the enhancer. When I turn the enhancer off, the messages vanish, but the "freak out" of the codec is still there - so the problem seems not to be related to the overflow messages. best regards, Frank ---------- Urspr?ngliche Nachricht --...
2010 Jan 13
2
Fwd: Re: Fixed Point on wideband-mode: Single Frame loss on 2000 Hz sine causes "freak off"
...how to proceed...<br /><br />best regards,<br />Frank<br /><br /><br /><br />Frank Lorenz <Frank_wtal@web.de> hat am 21. Dezember 2009 um 10:49 geschrieben:<br /><br />> An update:<br />><br />> I found that the "ADD32: output is not int:" messages are caused by the<br />> enhancer. When I turn the enhancer off, the messages vanish, but the "freak<br />> out" of the codec is still there - so the problem seems not to be related to<br />> the overflow messages.<br />&...
2010 Jan 04
0
Fixed Point on wideband-mode: Single Frame loss on 2000 Hz sine causes "freak off"
...what happens. I am willing to fix this issue, but because I do not know the internals of speex, I need some advice on how to proceed... best regards, Frank Frank Lorenz <Frank_wtal at web.de> hat am 21. Dezember 2009 um 10:49 geschrieben: > An update: > > I found that the "ADD32: output is not int:" messages are caused by the enhancer. When I turn the enhancer off, the messages vanish, but the "freak out" of the codec is still there - so the problem seems not to be related to the overflow messages. > > best regards, > Frank > > > ----------...
2016 Jun 17
5
ARM NEON optimization -- celt_fir()
Hi all, This is Linfeng Zhang from Google. I'll work on ARM NEON optimization in the next few months. I'm submitting 2 patches in the following couple of emails, which have the new created celt_fir_neon(). I revised celt_fir_c() to not pass in argument "mem" in Patch 1. If there are concerns to this change, please let me know. Many thanks to your comments. Linfeng Zhang
2010 Jan 13
0
Fwd: Re: Fixed Point on wideband-mode: Single Frame loss on 2000 Hz sine causes "freak off"
...know the internals of > speex, I > need some advice on how to proceed... > > best regards, > Frank > > > > Frank Lorenz <Frank_wtal at web.de> hat am 21. Dezember 2009 um 10:49 > geschrieben: > > > An update: > > > > I found that the "ADD32: output is not int:" messages are caused by the > > enhancer. When I turn the enhancer off, the messages vanish, but the > "freak > > out" of the codec is still there - so the problem seems not to be > related to > > the overflow messages. > > >...
2010 Jan 13
1
Fwd: Re: Fixed Point on wideband-mode: Single Frame loss on 2000 Hz sine causes "freak off"
...gt; ><br />> > Frank Lorenz <Frank_wtal@web.de> hat am 21. Dezember 2009 um 10:49<br />> > geschrieben:<br />> ><br />> >&nbsp; > An update:<br />> >&nbsp; ><br />> >&nbsp; > I found that the "ADD32: output is not int:" messages are caused by the<br />> >&nbsp; > enhancer. When I turn the enhancer off, the messages vanish, but the<br />> > "freak<br />> >&nbsp; > out" of the codec is still there - so the problem seems not to be&l...
2010 Jan 14
2
Fwd: Re: Fixed Point on wideband-mode: Single Frame loss on 2000 Hz sine causes "freak off"
...gt; > > > > > > > > > > Frank Lorenz <Frank_wtal at web.de> hat am 21. Dezember 2009 um 10:49 > > > > geschrieben: > > > > > > > > > An update: > > > > > > > > > > I found that the "ADD32: output is not int:" messages are caused > > by the > > > > > enhancer. When I turn the enhancer off, the messages vanish, but the > > > > "freak > > > > > out" of the codec is still there - so the problem seems not to be > >...
2015 Nov 21
8
[Aarch64 v2 10/18] Clean up some intrinsics-related wording in configure.
--- configure.ac | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/configure.ac b/configure.ac index f52d2c2..e1a6e9b 100644 --- a/configure.ac +++ b/configure.ac @@ -190,7 +190,7 @@ AC_ARG_ENABLE([rtcd], [enable_rtcd=yes]) AC_ARG_ENABLE([intrinsics], - [AS_HELP_STRING([--disable-intrinsics], [Disable intrinsics optimizations for ARM(float) X86(fixed)])],, +
2017 Apr 12
2
Is there a way to correlate operation to machine instruction?
For example, given a multiclass for ADD 32 bit that might produce something like: ADD32_REG_REG_REG (operands are all registers for a 32 bit add) ADD32_REG_IMM_REG (srcA is a register, srcB is an immediate and dst is a register) ADD32_REG_IMM_MEM (srcA is a register, srcB is an immediate and dst is a memory address) What I'd like to do is replace an operand, for example, change s...
2005 May 25
2
Speex on TI C6x, Problem with TI C5x Patch
...ere in > the code, I have a 16-bit value that gets sent to a function/macro that > expects a 32-bit value. In that case, Stuart's fixed_c55x.h file would > work because the inline function would first force the conversion to 32 > bits. My initial guess would be with the SH[RL]32 and ADD32 functions. That is my plan. >> I noticed that in Jamey Hicks original 1.1.6 patch, he had test code with >> inline function (and some counters for measuring macro use), but I got >> the >> same results in this build with the inline functions or the macros. So >> so...
2005 Nov 09
0
Noisy sound quality with Blackfin in WB-mode
..."R4", "I0", "I1", "L0", "L1", "B0", "B1", "memory" ); + + + for ( i=1; i<lag; i++ ) + { + ac[i]=SHR32(ac32[i+(10-(lag-1))], ac_shift); + } + + d=0; for (j=0;j<n;j++) { d = ADD32(d,SHR32(MULT16_16(x[j],x[j]), shift)); } - ac32[0] = d; - - for (i=0;i<lag;i++) - { - d=0; - for (j=i;j<lag_1;j++) - { - d = ADD32(d,SHR32(MULT16_16(x[j],x[j-i]), shift)); - } - if (i) - ac32[i] += d; - ac[i] = SHR32(ac32[i], ac_shift);...
2007 Feb 05
1
speex decoder
Hi, In fixed point speex code there is no where satuartions checks are used. The basic arithmetic operations like ADD,ADD32,SUB,MUL etc. are just directly implemented without the saturation checks. Can u please comment on this. For the speex decoder testing, is there any standard streams? if yes from where can i get those? Thaking you all, Yours, Jyothiprakash Reddy, T __________________________________________...
2009 Dec 18
0
Fixed Point on wideband-mode: Single Frame loss on 2000 Hz sine causes "freak off"
...e_int as second parameter for just one frame), the decoder starts to freak out a second later: It produces horrible noise with 0 dBFS. This horrible noise will not vanish until you turn off the input signal. I did some investigation on this with FIXED_DEBUG. The error messages are (lots of this): ADD32: output is not int: 1702286034 in ltp.c: line 68 ADD32: output is not int: 1455757562 in ltp.c: line 69 Call stack for this (only set the break point once, may be there are other call stacks on error, too): sb_decode ( ) at sb_celp.c:898 nb_decode ( ) at nb_celp.c:1471 multicomb ( ) at filter.c:7...
2009 Aug 16
3
llcon software using CELT
Hi all, I am the developer of the llcon software (llcon.sf.net) which is a software making it possible for musicians to play in real-time over the internet. Up to now I have used ADPCM or no audio coding. Gregory Maxwell was pointing me to the great CELT project. Using CELT has the advantage to be able to use higher sample rates, getting lower code rate and better error concealment. I have