Displaying 20 results from an estimated 66 matches for "add2".
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2005 Jan 14
1
S3/S4 classes performance comparison
...acceptable.
I was intending to do start properly, as starting from scratch new code. I
did write everything using S4 classes.
Doing a simple test reveals crucial efficiency differences between S3 and
S4 classes.
Here is the test:
---
### S3 CLASSES
S3content <- function(obj=NULL,add1=NULL,add2=NULL,type="",...){
out <- list(content=obj,add1=add2,add2=add2,type=type)
class(out) <- "S3Content"
return(out)
}
S3vector <- function(vec,...){
out <- S3content(obj=vec,type="Vector",...)
class(out) <- "S3Vector&qu...
2013 Oct 30
2
[LLVMdev] loop vectorizer
...r0 ];
c[ ir1 ] = a[ ir1 ] + b[ ir1 ];
}
}
LV: Found a loop: for.body
LV: Found an induction variable.
LV: We need to do 0 pointer comparisons.
LV: Checking memory dependencies
LV: Bad stride - Not an AddRecExpr pointer %arrayidx11 = getelementptr
inbounds float* %c, i64 %add2 SCEV: ((4 * %add2)<nsw> + %c)<nsw>
LV: Bad stride - Not an AddRecExpr pointer %arrayidx15 = getelementptr
inbounds float* %c, i64 %add8 SCEV: ((4 * %add8)<nsw> + %c)<nsw>
LV: Src Scev: ((4 * %add2)<nsw> + %c)<nsw>Sink Scev: ((4 * %add8)<nsw> +
%c)<ns...
2011 Jun 19
2
[LLVMdev] No Signed Wrap
Hi,
I am not able to understand the No Signed Wrap property. My problem is in
the Instruction combiner which combines two operations -
add1 = add 'nsw' x 5
add2 = add 'nsw' add1 1
into
add2 = add x 6. // No 'nsw' property in the combined operation.
>From the comments in the Instruction Combiner I can see that the nsw flag /
property is "conservatively cleared" but do not understand why - especially
when it was present in both...
2013 Oct 30
3
[LLVMdev] loop vectorizer
...ult i64 %start, %end
> br i1 %cmp9, label %for.body, label %for.end
>
> for.body: ; preds = %entry, %for.body
> %storemerge10 = phi i64 [ %inc, %for.body ], [ %start, %entry ]
> %div = lshr i64 %storemerge10, 2
> %mul1 = shl i64 %div, 3
> %rem = and i64 %storemerge10, 3
> %add2 = or i64 %mul1, %rem
> %0 = lshr i64 %storemerge10, 1
> %add51 = shl i64 %0, 2
> %mul6 = or i64 %rem, %add51
> %add8 = or i64 %mul6, 4
> %arrayidx = getelementptr inbounds float* %a, i64 %add2
> %1 = load float* %arrayidx, align 4
> %arrayidx9 = getelementptr inbounds float* %b...
2013 Oct 30
2
[LLVMdev] loop vectorizer
...; br i1 %cmp14, label %for.body, label %for.end
>
> for.body: ; preds = %entry, %for.body
> %i.015 = phi i64 [ %inc, %for.body ], [ %start, %entry ]
> %div = lshr i64 %i.015, 2
> %mul = shl i64 %div, 3
> %rem = and i64 %i.015, 3
> %add2 = or i64 %mul, %rem
> %add8 = or i64 %add2, 4
> %arrayidx = getelementptr inbounds float* %a, i64 %add2
> %0 = load float* %arrayidx, align 4
> %arrayidx9 = getelementptr inbounds float* %b, i64 %add2
> %1 = load float* %arrayidx9, align 4
> %add10 = fadd float %0, %1
>...
2011 Jun 19
0
[LLVMdev] No Signed Wrap
Hi Pranav,
> I am not able to understand the No Signed Wrap property. My problem is in the
> Instruction combiner which combines two operations -
> add1 = add 'nsw' x 5
> add2 = add 'nsw' add1 1
> into
> add2 = add x 6. // No 'nsw' property in the combined operation.
>
> From the comments in the Instruction Combiner I can see that the nsw flag /
> property is "conservatively cleared" but do not understand why - especially when
&...
2013 Oct 30
0
[LLVMdev] loop vectorizer
...mp ult i64 %start, %end
br i1 %cmp14, label %for.body, label %for.end
for.body: ; preds = %entry,
%for.body
%i.015 = phi i64 [ %inc, %for.body ], [ %start, %entry ]
%div = lshr i64 %i.015, 2
%mul = shl i64 %div, 3
%rem = and i64 %i.015, 3
%add2 = or i64 %mul, %rem
%add8 = or i64 %add2, 4
%arrayidx = getelementptr inbounds float* %a, i64 %add2
%0 = load float* %arrayidx, align 4
%arrayidx9 = getelementptr inbounds float* %b, i64 %add2
%1 = load float* %arrayidx9, align 4
%add10 = fadd float %0, %1
%arrayidx11 = getelem...
2017 Aug 07
2
vrp
...ot this under optimized version ( I don't want everything to be
eliminated)
define i32 @main() #0 {
entry:
br label %for.body
for.body: ; preds = %for.body,
%entry
%i.03 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
%s.02 = phi i32 [ 0, %entry ], [ %add2, %for.body ]
%j.01 = phi i32 [ 0, %entry ], [ %add1, %for.body ]
%add = add nsw i32 %j.01, %i.03
%add1 = add nsw i32 %add, 1
%add2 = add nsw i32 %s.02, %add1
%inc = add nsw i32 %i.03, 1
%cmp = icmp slt i32 %i.03, 99
br i1 %cmp, label %for.body, label %for.end
for.end:...
2013 Oct 30
0
[LLVMdev] loop vectorizer
...] + b[ ir1 ];
> }
> }
>
> LV: Found a loop: for.body
> LV: Found an induction variable.
> LV: We need to do 0 pointer comparisons.
> LV: Checking memory dependencies
> LV: Bad stride - Not an AddRecExpr pointer %arrayidx11 = getelementptr inbounds float* %c, i64 %add2 SCEV: ((4 * %add2)<nsw> + %c)<nsw>
> LV: Bad stride - Not an AddRecExpr pointer %arrayidx15 = getelementptr inbounds float* %c, i64 %add8 SCEV: ((4 * %add8)<nsw> + %c)<nsw>
> LV: Src Scev: ((4 * %add2)<nsw> + %c)<nsw>Sink Scev: ((4 * %add8)<nsw> + %...
2013 Oct 30
0
[LLVMdev] loop vectorizer
...t of length = 2.
LV: Checking a loop in "_Z3barmmPfS_S_"
LV: Found a loop: for.body
LV: Found an induction variable.
LV: We need to do 0 pointer comparisons.
LV: Checking memory dependencies
LV: Bad stride - Not an AddRecExpr pointer %arrayidx6 = getelementptr
inbounds float* %c, i64 %add2 SCEV: ((4 * %add2)<nsw> + %c)<nsw>
LV: Bad stride - Not an AddRecExpr pointer %arrayidx10 = getelementptr
inbounds float* %c, i64 %add312 SCEV: ((4 * %add312)<nsw> + %c)<nsw>
LV: Src Scev: ((4 * %add2)<nsw> + %c)<nsw>Sink Scev: ((4 * %add312)<nsw>
+ %c)...
2017 Aug 07
2
vrp
...a correct
behavior?". Yes, returning a conservative answer is always correct,
but not optimal.
As reference, a more sophisticated range analysis finds the following
ranges for your IR:
[0, +inf] %i.03 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
[0, +inf] %s.02 = phi i32 [ 0, %entry ], [ %add2, %for.body ]
[0, +inf] %j.01 = phi i32 [ 0, %entry ], [ %add1, %for.body ]
[0, +inf] %add = add nsw i32 %j.01, %i.03
[1, +inf] %add1 = add nsw i32 %add, 1
[1, +inf] %add2 = add nsw i32 %s.02, %add1
[1, +inf] %inc = add nsw i32 %i.03, 1
[2, +inf] %add3 = add nsw i32 %add2, %add1
--
Davide
2011 Jun 19
1
[LLVMdev] No Signed Wrap
On 19 June 2011 15:46, Duncan Sands <baldrick at free.fr> wrote:
>> I am not able to understand the No Signed Wrap property. My problem is in the
>> Instruction combiner which combines two operations -
>> add1 = add 'nsw' x 5
>> add2 = add 'nsw' add1 1
>> into
>> add2 = add x 6. // No 'nsw' property in the combined operation.
>>
>> From the comments in the Instruction Combiner I can see that the nsw flag /
>> property is "conservatively cleared" but do not understand why...
2013 Oct 30
0
[LLVMdev] loop vectorizer
...nd
br i1 %cmp9, label %for.body, label %for.end
for.body: ; preds = %entry,
%for.body
%storemerge10 = phi i64 [ %inc, %for.body ], [ %start, %entry ]
%div = lshr i64 %storemerge10, 2
%mul1 = shl i64 %div, 3
%rem = and i64 %storemerge10, 3
%add2 = or i64 %mul1, %rem
%0 = lshr i64 %storemerge10, 1
%add51 = shl i64 %0, 2
%mul6 = or i64 %rem, %add51
%add8 = or i64 %mul6, 4
%arrayidx = getelementptr inbounds float* %a, i64 %add2
%1 = load float* %arrayidx, align 4
%arrayidx9 = getelementptr inbounds float* %b, i64 %add2...
2017 Jun 23
2
sieve vacation message if ....
On Fri, 23 Jun 2017 14:46:21 +0200, Stephan Bosch stated:
>Op 21-6-2017 om 19:16 schreef lejeczek:
>> hi fellas
>>
>> generic construct for(if possible): reply vacation message if
>> address is not from add1 at com1 add2 at com2
>>
>> would you share?
>
>require "vacation";
>
>if not address "from" ["add1 at com1", "add2 at com2"] {
> vacation "I am on vacation.";
>}
>
>Regards,
>
>Stephan.
I have used this myself. I...
2017 Aug 07
2
vrp
...wer is always correct,
>> but not optimal.
>>
>> As reference, a more sophisticated range analysis finds the following
>> ranges for your IR:
>>
>> [0, +inf] %i.03 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
>> [0, +inf] %s.02 = phi i32 [ 0, %entry ], [ %add2, %for.body ]
>> [0, +inf] %j.01 = phi i32 [ 0, %entry ], [ %add1, %for.body ]
>> [0, +inf] %add = add nsw i32 %j.01, %i.03
>> [1, +inf] %add1 = add nsw i32 %add, 1
>> [1, +inf] %add2 = add nsw i32 %s.02, %add1
>> [1, +inf] %inc = add nsw i32 %i.03, 1
>> [2,...
2017 Jun 21
2
sieve vacation message if ....
hi fellas
generic construct for(if possible): reply vacation message
if address is not from add1 at com1 add2 at com2
would you share?
many thanks
L.
2013 Oct 30
3
[LLVMdev] loop vectorizer
On 30 October 2013 09:25, Nadav Rotem <nrotem at apple.com> wrote:
> The access pattern to arrays a and b is non-linear. Unrolled loops are
> usually handled by the SLP-vectorizer. Are ir0 and ir1 consecutive for all
> values for i ?
>
Based on his list of values, it seems that the induction stride is linear
within each block of 4 iterations, but it's not a clear
2014 Jul 23
3
[LLVMdev] On semantics of add instruction - nsw,nuw flags
...erforming the operation after a sext so
that the type is guaranteed to be big enough; or (as in C) by trusting
the programmer to make sure that doesn't happen.
> What are the redundancies in the following code snip. Assume they appear in
> that order in a basic block.
>
> Case1; %add2 = add nsw i32 %add, %add1
> %add3 = add i32 %add, %add1
>
> Case2: %add2 = add i32 %add, %add1
> %add3 = add nsw i32 %add, %add1
In both cases the add with nsw can be removed in favour of the one
without. Order is completely irrelevant for norm...
2009 Sep 02
1
[LLVMdev] LangRef description of 'add nsw' doesn't match reality
...grep nsw
%2 = nsw add i32 %1, 1 ; <i32> [#uses=1]
16:29|melis at juggle2:~> llvm-as add.ll
llvm-as: add.ll:14:8: error: expected instruction opcode
%2 = nsw add i32 %1, 1 ; <i32> [#uses=1]
^
16:29|melis at juggle2:~> cat add2.ll | grep nsw
%2 = add nsw i32 %1, 1 ; <i32> [#uses=1]
16:29|melis at juggle2:~> llvm-as add2.ll
16:29|melis at juggle2:~>
It seems the other variants of add (and sub) described also should list
the opcode first, followed by the wrap flag.
Paul
2017 Jun 23
1
sieve vacation message if ....
...ri, 23 Jun 2017 14:46:21 +0200, Stephan Bosch stated:
>
> >Op 21-6-2017 om 19:16 schreef lejeczek:
> >> hi fellas
> >>
> >> generic construct for(if possible): reply vacation message if
> >> address is not from add1 at com1 add2 at com2
> >>
> >> would you share?
> >
> >require "vacation";
> >
> >if not address "from" ["add1 at com1", "add2 at com2"] {
> > vacation "I am on vacation.";
&g...