search for: add19

It's not clear what is actually wrong from your original message, I think you need to give some more information as to what you are doing: Example source, what target GPU, compiler error messages or other evidence of "it's wrong" (llvm IR, disassembly, etc) ... -- Mats On 8 April 2016 at 09:55, Liu Xin via llvm-dev <llvm-dev at lists.llvm.org> wrote: > I built it

...4, !tbaa !1 %add15 = add nsw i32 %add13, %8 > %arrayidx16 = getelementptr inbounds i32* %a, i32 9 %9 = load i32* > %arrayidx16, align 4, !tbaa !1 %add17 = add nsw i32 %add15, %9 > %arrayidx18 = getelementptr inbounds i32* %a, i32 10 %10 = load i32* > %arrayidx18, align 4, !tbaa !1 %add19 = add nsw i32 %add17, %10 > %arrayidx20 = getelementptr inbounds i32* %a, i32 11 %11 = load i32* > %arrayidx20, align 4, !tbaa !1 %add21 = add nsw i32 %add19, %11 > %arrayidx22 = getelementptr inbounds i32* %a, i32 12 %12 = load i32* > %arrayidx22, align 4, !tbaa !1 %add23 = add nsw...

...x14, align 4, !tbaa !1 %add15 = add nsw i32 %add13, %8 %arrayidx16 = getelementptr inbounds i32* %a, i32 9 %9 = load i32* %arrayidx16, align 4, !tbaa !1 %add17 = add nsw i32 %add15, %9 %arrayidx18 = getelementptr inbounds i32* %a, i32 10 %10 = load i32* %arrayidx18, align 4, !tbaa !1 %add19 = add nsw i32 %add17, %10 %arrayidx20 = getelementptr inbounds i32* %a, i32 11 %11 = load i32* %arrayidx20, align 4, !tbaa !1 %add21 = add nsw i32 %add19, %11 %arrayidx22 = getelementptr inbounds i32* %a, i32 12 %12 = load i32* %arrayidx22, align 4, !tbaa !1 %add23 = add nsw i32 %add21,...

...%arrayidx14, align 4, !tbaa !1 %add15 = add nsw i32 %add13, %8 %arrayidx16 = getelementptr inbounds i32* %a, i32 9 %9 = load i32* %arrayidx16, align 4, !tbaa !1 %add17 = add nsw i32 %add15, %9 %arrayidx18 = getelementptr inbounds i32* %a, i32 10 %10 = load i32* %arrayidx18, align 4, !tbaa !1 %add19 = add nsw i32 %add17, %10 %arrayidx20 = getelementptr inbounds i32* %a, i32 11 %11 = load i32* %arrayidx20, align 4, !tbaa !1 %add21 = add nsw i32 %add19, %11 %arrayidx22 = getelementptr inbounds i32* %a, i32 12 %12 = load i32* %arrayidx22, align 4, !tbaa !1 %add23 = add nsw i32 %add21, %12 %ar...

...telementptr inbounds i32* %a, i32 9 > > > %9 = load i32* %arrayidx16, align 4, !tbaa !1 > > > %add17 = add nsw i32 %add15, %9 > > > %arrayidx18 = getelementptr inbounds i32* %a, i32 10 > > > %10 = load i32* %arrayidx18, align 4, !tbaa !1 > > > %add19 = add nsw i32 %add17, %10 > > > %arrayidx20 = getelementptr inbounds i32* %a, i32 11 > > > %11 = load i32* %arrayidx20, align 4, !tbaa !1 > > > %add21 = add nsw i32 %add19, %11 > > > %arrayidx22 = getelementptr inbounds i32* %a, i32 12 > > > %1...

...nds i8* %r.063, i32 3 %2 = load i8* %incdec.ptr12, align 1, !tbaa !0 %conv14 = zext i8 %0 to i32 %mul = mul nsw i32 %conv14, 123 %conv15 = zext i8 %1 to i32 %mul16 = mul nsw i32 %conv15, 321 %conv17 = zext i8 %2 to i32 %mul18 = mul nsw i32 %conv17, 567 %add = add i32 %mul16, %mul %add19 = add i32 %add, %mul18 %conv20 = trunc i32 %add19 to i8 %incdec.ptr21 = getelementptr inbounds i8* %w.065, i32 1 store i8 %conv20, i8* %w.065, align 1, !tbaa !0 %mul23 = mul nsw i32 %conv14, 234 %mul25 = mul nsw i32 %conv15, 432 %mul28 = mul nsw i32 %conv17, 987 %add26 = add i32 %mul2...

On Thu, Jan 26, 2012 at 3:41 PM, Hal Finkel <hfinkel at anl.gov> wrote: > On Thu, 2012-01-26 at 15:36 -0600, Sebastian Pop wrote: >> arm-none-linux-gnueabi > > Indeed, adding -ccc-host-triple arm-none-linux-gnueabi I also get Minor remark: please use -target instead of -ccc-host-triple that is now deprecated. Thanks for looking at this testcase. Sebastian -- Qualcomm

On Thu, 2012-01-26 at 15:36 -0600, Sebastian Pop wrote: > arm-none-linux-gnueabi Indeed, adding -ccc-host-triple arm-none-linux-gnueabi I also get vectorization (even though I don't get vectorization when targeting x86_64). I'll let you know what I find. -Hal -- Hal Finkel Postdoctoral Appointee Leadership Computing Facility Argonne National Laboratory

On Thu, 2012-01-26 at 15:12 -0600, Sebastian Pop wrote: > On Thu, Jan 26, 2012 at 2:49 PM, Hal Finkel <hfinkel at anl.gov> wrote: > > Thanks! Did you compile with any non-default flags other than -mllvm > > -vectorize? > > I used -O3 and -vectorize, no other non-default flags. If I run clang -O3 -mllvm -vectorize -S -emit-llvm -o test.ll test.c then I get no

...tmp43 to i32 %tmp50 = load i8* %arrayidx49, align 1, !tbaa !0 %conv51 = zext i8 %tmp50 to i32 %sub.i183 = add nsw i32 %conv, -128 %sub6.i184 = add nsw i32 %conv51, -128 %tmp.i185 = mul i32 %conv44, 298 %mul17.i186 = mul nsw i32 %sub6.i184, 459 %add18.i187 = add i32 %tmp.i185, -4640 %add19.i188 = add i32 %mul17.i186, %add18.i187 %shr.i189 = ashr i32 %add19.i188, 8 %mul26.i190 = mul nsw i32 %sub.i183, -55 %mul30.i191 = mul nsw i32 %sub6.i184, -136 %add31.i192 = add i32 %add18.i187, %mul26.i190 %add32.i193 = add i32 %add31.i192, %mul30.i191 %shr33.i194 = ashr i32 %add32.i19...

...ext i8 %tmp43 to i32 %tmp50 = load i8* %arrayidx49, align 1, !tbaa !0 %conv51 = zext i8 %tmp50 to i32 %sub.i183 = add nsw i32 %conv, -128 %sub6.i184 = add nsw i32 %conv51, -128 %tmp.i185 = mul i32 %conv44, 298 %mul17.i186 = mul nsw i32 %sub6.i184, 459 %add18.i187 = add i32 %tmp.i185, -4640 %add19.i188 = add i32 %mul17.i186, %add18.i187 %shr.i189 = ashr i32 %add19.i188, 8 %mul26.i190 = mul nsw i32 %sub.i183, -55 %mul30.i191 = mul nsw i32 %sub6.i184, -136 %add31.i192 = add i32 %add18.i187, %mul26.i190 %add32.i193 = add i32 %add31.i192, %mul30.i191 %shr33.i194 = ashr i32 %add32.i193, 8...