Displaying 5 results from an estimated 5 matches for "add17".
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add1
2014 Sep 18
2
[LLVMdev] [Vectorization] Mis match in code generated
...n 4, !tbaa !1 %add13 = add nsw i32 %add11, %7
> %arrayidx14 = getelementptr inbounds i32* %a, i32 8 %8 = load i32*
> %arrayidx14, align 4, !tbaa !1 %add15 = add nsw i32 %add13, %8
> %arrayidx16 = getelementptr inbounds i32* %a, i32 9 %9 = load i32*
> %arrayidx16, align 4, !tbaa !1 %add17 = add nsw i32 %add15, %9
> %arrayidx18 = getelementptr inbounds i32* %a, i32 10 %10 = load i32*
> %arrayidx18, align 4, !tbaa !1 %add19 = add nsw i32 %add17, %10
> %arrayidx20 = getelementptr inbounds i32* %a, i32 11 %11 = load i32*
> %arrayidx20, align 4, !tbaa !1 %add21 = add nsw...
2014 Sep 19
3
[LLVMdev] [Vectorization] Mis match in code generated
...idx12, align 4, !tbaa !1
%add13 = add nsw i32 %add11, %7
%arrayidx14 = getelementptr inbounds i32* %a, i32 8
%8 = load i32* %arrayidx14, align 4, !tbaa !1
%add15 = add nsw i32 %add13, %8
%arrayidx16 = getelementptr inbounds i32* %a, i32 9
%9 = load i32* %arrayidx16, align 4, !tbaa !1
%add17 = add nsw i32 %add15, %9
%arrayidx18 = getelementptr inbounds i32* %a, i32 10
%10 = load i32* %arrayidx18, align 4, !tbaa !1
%add19 = add nsw i32 %add17, %10
%arrayidx20 = getelementptr inbounds i32* %a, i32 11
%11 = load i32* %arrayidx20, align 4, !tbaa !1
%add21 = add nsw i32 %add19,...
2014 Sep 18
2
[LLVMdev] [Vectorization] Mis match in code generated
...2*
%arrayidx12, align 4, !tbaa !1 %add13 = add nsw i32 %add11, %7
%arrayidx14 = getelementptr inbounds i32* %a, i32 8 %8 = load i32*
%arrayidx14, align 4, !tbaa !1 %add15 = add nsw i32 %add13, %8
%arrayidx16 = getelementptr inbounds i32* %a, i32 9 %9 = load i32*
%arrayidx16, align 4, !tbaa !1 %add17 = add nsw i32 %add15, %9
%arrayidx18 = getelementptr inbounds i32* %a, i32 10 %10 = load i32*
%arrayidx18, align 4, !tbaa !1 %add19 = add nsw i32 %add17, %10
%arrayidx20 = getelementptr inbounds i32* %a, i32 11 %11 = load i32*
%arrayidx20, align 4, !tbaa !1 %add21 = add nsw i32 %add19, %11
%arr...
2014 Nov 10
2
[LLVMdev] [Vectorization] Mis match in code generated
...getelementptr inbounds i32* %a, i32 8
> > > %8 = load i32* %arrayidx14, align 4, !tbaa !1
> > > %add15 = add nsw i32 %add13, %8
> > > %arrayidx16 = getelementptr inbounds i32* %a, i32 9
> > > %9 = load i32* %arrayidx16, align 4, !tbaa !1
> > > %add17 = add nsw i32 %add15, %9
> > > %arrayidx18 = getelementptr inbounds i32* %a, i32 10
> > > %10 = load i32* %arrayidx18, align 4, !tbaa !1
> > > %add19 = add nsw i32 %add17, %10
> > > %arrayidx20 = getelementptr inbounds i32* %a, i32 11
> > > %11...
2015 May 21
2
[LLVMdev] How can I remove these redundant copy between registers?
Hi,
I've been working on a Blackfin backend (llvm-3.6.0) based on the previous
one that was removed in llvm-3.1.
llc generates codes like this:
29 p1 = r2;
30 r5 = [p1];
31 p1 = r2;
32 r6 = [p1 + 4];
33 r5 = r6 + r5;
34 r6 = [p0 + -4];
35 r5 *= r6;
36 p1 = r2;
37 r6 = [p1 + 8];
38 p1 = r2;
p1 and r2 are in different register classes.
A p*