Displaying 12 results from an estimated 12 matches for "add15".
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add1
2014 Sep 18
2
[LLVMdev] [Vectorization] Mis match in code generated
...gn 4, !tbaa !1 %add11 = add nsw i32 %add9, %6
> %arrayidx12 = getelementptr inbounds i32* %a, i32 7 %7 = load i32*
> %arrayidx12, align 4, !tbaa !1 %add13 = add nsw i32 %add11, %7
> %arrayidx14 = getelementptr inbounds i32* %a, i32 8 %8 = load i32*
> %arrayidx14, align 4, !tbaa !1 %add15 = add nsw i32 %add13, %8
> %arrayidx16 = getelementptr inbounds i32* %a, i32 9 %9 = load i32*
> %arrayidx16, align 4, !tbaa !1 %add17 = add nsw i32 %add15, %9
> %arrayidx18 = getelementptr inbounds i32* %a, i32 10 %10 = load i32*
> %arrayidx18, align 4, !tbaa !1 %add19 = add nsw i32...
2014 Sep 19
3
[LLVMdev] [Vectorization] Mis match in code generated
...yidx10, align 4, !tbaa !1
%add11 = add nsw i32 %add9, %6
%arrayidx12 = getelementptr inbounds i32* %a, i32 7
%7 = load i32* %arrayidx12, align 4, !tbaa !1
%add13 = add nsw i32 %add11, %7
%arrayidx14 = getelementptr inbounds i32* %a, i32 8
%8 = load i32* %arrayidx14, align 4, !tbaa !1
%add15 = add nsw i32 %add13, %8
%arrayidx16 = getelementptr inbounds i32* %a, i32 9
%9 = load i32* %arrayidx16, align 4, !tbaa !1
%add17 = add nsw i32 %add15, %9
%arrayidx18 = getelementptr inbounds i32* %a, i32 10
%10 = load i32* %arrayidx18, align 4, !tbaa !1
%add19 = add nsw i32 %add17, %10...
2014 Sep 18
2
[LLVMdev] [Vectorization] Mis match in code generated
...32* %arrayidx10, align 4, !tbaa !1 %add11 = add nsw i32 %add9, %6
%arrayidx12 = getelementptr inbounds i32* %a, i32 7 %7 = load i32*
%arrayidx12, align 4, !tbaa !1 %add13 = add nsw i32 %add11, %7
%arrayidx14 = getelementptr inbounds i32* %a, i32 8 %8 = load i32*
%arrayidx14, align 4, !tbaa !1 %add15 = add nsw i32 %add13, %8
%arrayidx16 = getelementptr inbounds i32* %a, i32 9 %9 = load i32*
%arrayidx16, align 4, !tbaa !1 %add17 = add nsw i32 %add15, %9
%arrayidx18 = getelementptr inbounds i32* %a, i32 10 %10 = load i32*
%arrayidx18, align 4, !tbaa !1 %add19 = add nsw i32 %add17, %10
%arrayi...
2013 Nov 08
1
[LLVMdev] loop vectorizer and storing to uniform addresses
...%add11 = fadd float %13, %14
%arrayidx12 = getelementptr inbounds [4 x float]* %sum, i32 0, i64 2
%15 = load float* %arrayidx12, align 4
%add13 = fadd float %add11, %15
%arrayidx14 = getelementptr inbounds [4 x float]* %sum, i32 0, i64 3
%16 = load float* %arrayidx14, align 4
%add15 = fadd float %add13, %16
ret float %add15
}
Thus, the inner loop is not unrolled.
opt -basicaa -loop-vectorize -debug-only=loop-vectorize
-vectorizer-min-trip-count=4 -S sum.ll
LV: Checking a loop in "foo"
LV: Found a loop: for.cond1
LV: SCEV could not compute the loop exit count...
2014 Nov 10
2
[LLVMdev] [Vectorization] Mis match in code generated
...getelementptr inbounds i32* %a, i32 7
> > > %7 = load i32* %arrayidx12, align 4, !tbaa !1
> > > %add13 = add nsw i32 %add11, %7
> > > %arrayidx14 = getelementptr inbounds i32* %a, i32 8
> > > %8 = load i32* %arrayidx14, align 4, !tbaa !1
> > > %add15 = add nsw i32 %add13, %8
> > > %arrayidx16 = getelementptr inbounds i32* %a, i32 9
> > > %9 = load i32* %arrayidx16, align 4, !tbaa !1
> > > %add17 = add nsw i32 %add15, %9
> > > %arrayidx18 = getelementptr inbounds i32* %a, i32 10
> > > %10 =...
2013 Nov 08
0
[LLVMdev] loop vectorizer and storing to uniform addresses
On 7 November 2013 17:18, Frank Winter <fwinter at jlab.org> wrote:
> LV: We don't allow storing to uniform addresses
>
This is triggering because it didn't recognize as a reduction variable
during the canVectorizeInstrs() but did recognize that sum[q] is loop
invariant in canVectorizeMemory().
I'm guessing the nested loop was unrolled because of the low trip-count,
and
2013 Nov 08
3
[LLVMdev] loop vectorizer and storing to uniform addresses
I am trying my luck on this global reduction kernel:
float foo( int start , int end , float * A )
{
float sum[4] = {0.,0.,0.,0.};
for (int i = start ; i < end ; ++i ) {
for (int q = 0 ; q < 4 ; ++q )
sum[q] += A[i*4+q];
}
return sum[0]+sum[1]+sum[2]+sum[3];
}
LV: Checking a loop in "foo"
LV: Found a loop: for.cond1
LV: Found an induction variable.
LV: We
2011 Dec 02
5
[LLVMdev] [llvm-commits] [PATCH] BasicBlock Autovectorization Pass
...5 = fmul double %i3, %i4
> + %arrayidx6 = getelementptr inbounds double* %c, i64 1
> + %i5 = load double* %arrayidx6, align 8
> + %add7 = fadd double %mul5, %i5
> + %mul9 = fmul double %add, %i1
> + %add11 = fadd double %mul9, %i2
> + %mul13 = fmul double %add7, %i4
> + %add15 = fadd double %mul13, %i5
> + %mul16 = fmul double %add11, %add15
> + ret double %mul16
> +; CHECK: @test1
> +; CHECK:<2 x double>
For me this CHECK looks very short. Should all instructions be
vectorized or is it sufficient if one is vectorized. Also, it would be
nice if I cou...
2011 Dec 14
0
[LLVMdev] [llvm-commits] [PATCH] BasicBlock Autovectorization Pass
...+ %arrayidx6 = getelementptr inbounds double* %c, i64 1
> > + %i5 = load double* %arrayidx6, align 8
> > + %add7 = fadd double %mul5, %i5
> > + %mul9 = fmul double %add, %i1
> > + %add11 = fadd double %mul9, %i2
> > + %mul13 = fmul double %add7, %i4
> > + %add15 = fadd double %mul13, %i5
> > + %mul16 = fmul double %add11, %add15
> > + ret double %mul16
> > +; CHECK: @test1
> > +; CHECK:<2 x double>
>
> For me this CHECK looks very short. Should all instructions be
> vectorized or is it sufficient if one is vectoriz...
2011 Nov 23
0
[LLVMdev] [llvm-commits] [PATCH] BasicBlock Autovectorization Pass
On Mon, 2011-11-21 at 21:22 -0600, Hal Finkel wrote:
> On Mon, 2011-11-21 at 11:55 -0600, Hal Finkel wrote:
> > Tobias,
> >
> > I've attached an updated patch. It contains a few bug fixes and many
> > (refactoring and coding-convention) changes inspired by your comments.
> >
> > I'm currently trying to fix the bug responsible for causing a compile
2011 Dec 02
0
[LLVMdev] [llvm-commits] [PATCH] BasicBlock Autovectorization Pass
...+ %arrayidx6 = getelementptr inbounds double* %c, i64 1
> > + %i5 = load double* %arrayidx6, align 8
> > + %add7 = fadd double %mul5, %i5
> > + %mul9 = fmul double %add, %i1
> > + %add11 = fadd double %mul9, %i2
> > + %mul13 = fmul double %add7, %i4
> > + %add15 = fadd double %mul13, %i5
> > + %mul16 = fmul double %add11, %add15
> > + ret double %mul16
> > +; CHECK: @test1
> > +; CHECK:<2 x double>
>
> For me this CHECK looks very short. Should all instructions be
> vectorized or is it sufficient if one is vectoriz...
2011 Nov 22
5
[LLVMdev] [llvm-commits] [PATCH] BasicBlock Autovectorization Pass
On Mon, 2011-11-21 at 11:55 -0600, Hal Finkel wrote:
> Tobias,
>
> I've attached an updated patch. It contains a few bug fixes and many
> (refactoring and coding-convention) changes inspired by your comments.
>
> I'm currently trying to fix the bug responsible for causing a compile
> failure when compiling
>