search for: add11

Displaying 20 results from an estimated 22 matches for "add11".

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2010 Jun 05
0
[LLVMdev] Converting into SSA form
...0 = phi i32 [ 6, %if.then ], [ 2, %if.else ] ; <i32> [#uses=1] %b.0 = phi i32 [ 3, %if.then ], [ 4, %if.else ] ; <i32> [#uses=1] %c.0 = phi i32 [ %add, %if.then ], [ %mul, %if.else ] ; <i32> [#uses=1] %add8 = add nsw i32 %c.0, %a.0 ; <i32> [#uses=1] %add11 = add nsw i32 %add8, %b.0 ; <i32> [#uses=1] ret i32 %add11 } In order to preserve the constants' names from the original program, mem2reg would have to insert operations like %a.0 = bitcast i32 2 to i32 which subsequent optimizers would have to remove again, slowing do...
2010 Jun 05
2
[LLVMdev] Converting into SSA form
Suppose my Input function is like : myfunc(int x,int y){ int a=2, b=3,c=5; if(x>y) { c=a+b; a=6; } else { c=a*b; b=4; } a=c+a; c=a+b; } and the output should be : myfunc(int x,int y){ int a.0=2, b.0=3,c.0=5; if(x>y) { c.1=a.0+b.0; a.1=6; } else { c.2=a.0*b.0; b.1=4; }
2010 Jun 07
2
[LLVMdev] Converting into SSA form
...%if.then ], [ 2, %if.else ] ; <i32> [#uses=1] >  %b.0 = phi i32 [ 3, %if.then ], [ 4, %if.else ] ; <i32> [#uses=1] >  %c.0 = phi i32 [ %add, %if.then ], [ %mul, %if.else ] ; <i32> [#uses=1] >  %add8 = add nsw i32 %c.0, %a.0                  ; <i32> [#uses=1] >  %add11 = add nsw i32 %add8, %b.0                ; <i32> [#uses=1] >  ret i32 %add11 > } > > In order to preserve the constants' names from the original program, > mem2reg would have to insert operations like > > %a.0 = bitcast i32 2 to i32 > > which subsequent optimize...
2014 Sep 18
2
[LLVMdev] [Vectorization] Mis match in code generated
...align 4, !tbaa !1 > %add7 = add nsw i32 %add5, %4 %arrayidx8 = getelementptr inbounds i32* %a, > i32 5 %5 = load i32* %arrayidx8, align 4, !tbaa !1 %add9 = add nsw i32 > %add7, %5 %arrayidx10 = getelementptr inbounds i32* %a, i32 6 %6 = load > i32* %arrayidx10, align 4, !tbaa !1 %add11 = add nsw i32 %add9, %6 > %arrayidx12 = getelementptr inbounds i32* %a, i32 7 %7 = load i32* > %arrayidx12, align 4, !tbaa !1 %add13 = add nsw i32 %add11, %7 > %arrayidx14 = getelementptr inbounds i32* %a, i32 8 %8 = load i32* > %arrayidx14, align 4, !tbaa !1 %add15 = add nsw i32 %a...
2014 Sep 19
3
[LLVMdev] [Vectorization] Mis match in code generated
...%arrayidx6, align 4, !tbaa !1 %add7 = add nsw i32 %add5, %4 %arrayidx8 = getelementptr inbounds i32* %a, i32 5 %5 = load i32* %arrayidx8, align 4, !tbaa !1 %add9 = add nsw i32 %add7, %5 %arrayidx10 = getelementptr inbounds i32* %a, i32 6 %6 = load i32* %arrayidx10, align 4, !tbaa !1 %add11 = add nsw i32 %add9, %6 %arrayidx12 = getelementptr inbounds i32* %a, i32 7 %7 = load i32* %arrayidx12, align 4, !tbaa !1 %add13 = add nsw i32 %add11, %7 %arrayidx14 = getelementptr inbounds i32* %a, i32 8 %8 = load i32* %arrayidx14, align 4, !tbaa !1 %add15 = add nsw i32 %add13, %8 %...
2014 Sep 18
2
[LLVMdev] [Vectorization] Mis match in code generated
...oad i32* %arrayidx6, align 4, !tbaa !1 %add7 = add nsw i32 %add5, %4 %arrayidx8 = getelementptr inbounds i32* %a, i32 5 %5 = load i32* %arrayidx8, align 4, !tbaa !1 %add9 = add nsw i32 %add7, %5 %arrayidx10 = getelementptr inbounds i32* %a, i32 6 %6 = load i32* %arrayidx10, align 4, !tbaa !1 %add11 = add nsw i32 %add9, %6 %arrayidx12 = getelementptr inbounds i32* %a, i32 7 %7 = load i32* %arrayidx12, align 4, !tbaa !1 %add13 = add nsw i32 %add11, %7 %arrayidx14 = getelementptr inbounds i32* %a, i32 8 %8 = load i32* %arrayidx14, align 4, !tbaa !1 %add15 = add nsw i32 %add13, %8 %arrayidx16...
2013 Nov 08
1
[LLVMdev] loop vectorizer and storing to uniform addresses
...for.end8: ; preds = %for.cond %arrayidx9 = getelementptr inbounds [4 x float]* %sum, i32 0, i64 0 %13 = load float* %arrayidx9, align 4 %arrayidx10 = getelementptr inbounds [4 x float]* %sum, i32 0, i64 1 %14 = load float* %arrayidx10, align 4 %add11 = fadd float %13, %14 %arrayidx12 = getelementptr inbounds [4 x float]* %sum, i32 0, i64 2 %15 = load float* %arrayidx12, align 4 %add13 = fadd float %add11, %15 %arrayidx14 = getelementptr inbounds [4 x float]* %sum, i32 0, i64 3 %16 = load float* %arrayidx14, align 4 %add15 = fa...
2013 Oct 28
2
[LLVMdev] loop vectorizer says Bad stride
...dxprom6 %13 = load float* %arrayidx7, align 4 %14 = load i32* %i, align 4 %add8 = add nsw i32 256, %14 %idxprom9 = sext i32 %add8 to i64 %15 = load float** %b.addr, align 8 %arrayidx10 = getelementptr inbounds float* %15, i64 %idxprom9 %16 = load float* %arrayidx10, align 4 %add11 = fadd float %13, %16 %17 = load i32* %i, align 4 %add12 = add nsw i32 256, %17 %idxprom13 = sext i32 %add12 to i64 %18 = load float** %c.addr, align 8 %arrayidx14 = getelementptr inbounds float* %18, i64 %idxprom13 store float %add11, float* %arrayidx14, align 4 br label %for....
2014 Nov 10
2
[LLVMdev] [Vectorization] Mis match in code generated
...= getelementptr inbounds i32* %a, i32 5 > > > %5 = load i32* %arrayidx8, align 4, !tbaa !1 > > > %add9 = add nsw i32 %add7, %5 > > > %arrayidx10 = getelementptr inbounds i32* %a, i32 6 > > > %6 = load i32* %arrayidx10, align 4, !tbaa !1 > > > %add11 = add nsw i32 %add9, %6 > > > %arrayidx12 = getelementptr inbounds i32* %a, i32 7 > > > %7 = load i32* %arrayidx12, align 4, !tbaa !1 > > > %add13 = add nsw i32 %add11, %7 > > > %arrayidx14 = getelementptr inbounds i32* %a, i32 8 > > > %8 = loa...
2013 Oct 28
0
[LLVMdev] loop vectorizer says Bad stride
...float* %arrayidx7, align 4 > %14 = load i32* %i, align 4 > %add8 = add nsw i32 256, %14 > %idxprom9 = sext i32 %add8 to i64 > %15 = load float** %b.addr, align 8 > %arrayidx10 = getelementptr inbounds float* %15, i64 %idxprom9 > %16 = load float* %arrayidx10, align 4 > %add11 = fadd float %13, %16 > %17 = load i32* %i, align 4 > %add12 = add nsw i32 256, %17 > %idxprom13 = sext i32 %add12 to i64 > %18 = load float** %c.addr, align 8 > %arrayidx14 = getelementptr inbounds float* %18, i64 %idxprom13 > store float %add11, float* %arrayidx14, align 4...
2012 Jul 15
0
[LLVMdev] Issue with Machine Verifier and earlyclobber
...l4 = fmul float %sub, %call %mul5 = fmul float %days, 0x3E27C04CA0000000 %sub6 = fsub float 0x3F94790B80000000, %mul5 %mul7 = fmul float %add2, 2.000000e+00 %call8 = tail call float @dsin(float %mul7) nounwind readnone %mul9 = fmul float %sub6, %call8 %add10 = fadd float %mul4, %mul9 %add11 = fadd float %add, %add10 %mul12 = fmul float %days, 0x3E13C5B640000000 %sub13 = fsub float 0x3F911C1180000000, %mul12 %mul14 = fmul float %add, 2.000000e+00 %call15 = tail call float @dsin(float %mul14) nounwind readnone %mul16 = fmul float %call15, 0x3FF1F736C0000000 %mul17 = fmul flo...
2012 Jul 15
2
[LLVMdev] Issue with Machine Verifier and earlyclobber
On Jul 15, 2012, at 9:20 AM, Borja Ferrer <borja.ferav at gmail.com> wrote: > Jakob, one more hint, I've placed some asserts around the code you added and noticed that the InlineSpiller::insertReload() function is not being called. > > 2012/7/14 Borja Ferrer <borja.ferav at gmail.com> > Hello Jakob, > > I'm still getting the error, I can give you any other
2013 Nov 08
0
[LLVMdev] loop vectorizer and storing to uniform addresses
On 7 November 2013 17:18, Frank Winter <fwinter at jlab.org> wrote: > LV: We don't allow storing to uniform addresses > This is triggering because it didn't recognize as a reduction variable during the canVectorizeInstrs() but did recognize that sum[q] is loop invariant in canVectorizeMemory(). I'm guessing the nested loop was unrolled because of the low trip-count, and
2013 Nov 08
3
[LLVMdev] loop vectorizer and storing to uniform addresses
I am trying my luck on this global reduction kernel: float foo( int start , int end , float * A ) { float sum[4] = {0.,0.,0.,0.}; for (int i = start ; i < end ; ++i ) { for (int q = 0 ; q < 4 ; ++q ) sum[q] += A[i*4+q]; } return sum[0]+sum[1]+sum[2]+sum[3]; } LV: Checking a loop in "foo" LV: Found a loop: for.cond1 LV: Found an induction variable. LV: We
2012 Aug 13
6
named character question
Dear R People: Here is a goofy question: I want to extract the zip code from an address and here is my work so far: > add1 results.formatted_address "200 W Rosamond St, Houston, TX 77076, USA" > add1[1][32:36] <NA> <NA> <NA> <NA> <NA> NA NA NA NA NA > str(add1) Named chr "200 W Rosamond St, Houston, TX 77076,
2012 Nov 11
2
[LLVMdev] problem trying to write an LLVM register-allocation pass
Hi Susan, It looks like the bitcode you have attached is corrupted. You should make sure to attach it as a binary file. Alternatively you can attach the LLVM assembly as text. You can generate an assembly file from bitcode with: llvm-dis -o <asm file> <bitcode> Regards, Lang. On Fri, Nov 9, 2012 at 11:15 AM, Susan Horwitz <horwitz at cs.wisc.edu> wrote: > Thanks Lang,
2012 Nov 11
0
[LLVMdev] problem trying to write an LLVM register-allocation pass
...%sub = sub nsw i32 %mul, 1 %mul3 = mul nsw i32 %add, %sub %add4 = add nsw i32 %x.0, %mul3 %div5 = sdiv i32 %add4, %x.0 %add6 = add nsw i32 5, %add %sub7 = sub nsw i32 %div5, %add6 %add8 = add nsw i32 %add4, %sub7 %add9 = add nsw i32 %add8, %x.0 %add10 = add nsw i32 %add9, %add %add11 = add nsw i32 %add10, %sub %call12 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([37 x i8]* @.str1, i32 0, i32 0), i32 %add4, i32 %sub7, i32 %add11, i32 %x.0, i32 %add, i32 %sub) ret i32 0 } declare i32 @rand() nounwind declare i32 @printf(i8*, ...)
2011 Dec 02
5
[LLVMdev] [llvm-commits] [PATCH] BasicBlock Autovectorization Pass
...ds double* %b, i64 1 > + %i4 = load double* %arrayidx4, align 8 > + %mul5 = fmul double %i3, %i4 > + %arrayidx6 = getelementptr inbounds double* %c, i64 1 > + %i5 = load double* %arrayidx6, align 8 > + %add7 = fadd double %mul5, %i5 > + %mul9 = fmul double %add, %i1 > + %add11 = fadd double %mul9, %i2 > + %mul13 = fmul double %add7, %i4 > + %add15 = fadd double %mul13, %i5 > + %mul16 = fmul double %add11, %add15 > + ret double %mul16 > +; CHECK: @test1 > +; CHECK:<2 x double> For me this CHECK looks very short. Should all instructions be vect...
2011 Dec 14
0
[LLVMdev] [llvm-commits] [PATCH] BasicBlock Autovectorization Pass
...i4 = load double* %arrayidx4, align 8 > > + %mul5 = fmul double %i3, %i4 > > + %arrayidx6 = getelementptr inbounds double* %c, i64 1 > > + %i5 = load double* %arrayidx6, align 8 > > + %add7 = fadd double %mul5, %i5 > > + %mul9 = fmul double %add, %i1 > > + %add11 = fadd double %mul9, %i2 > > + %mul13 = fmul double %add7, %i4 > > + %add15 = fadd double %mul13, %i5 > > + %mul16 = fmul double %add11, %add15 > > + ret double %mul16 > > +; CHECK: @test1 > > +; CHECK:<2 x double> > > For me this CHECK looks ver...
2011 Nov 23
0
[LLVMdev] [llvm-commits] [PATCH] BasicBlock Autovectorization Pass
On Mon, 2011-11-21 at 21:22 -0600, Hal Finkel wrote: > On Mon, 2011-11-21 at 11:55 -0600, Hal Finkel wrote: > > Tobias, > > > > I've attached an updated patch. It contains a few bug fixes and many > > (refactoring and coding-convention) changes inspired by your comments. > > > > I'm currently trying to fix the bug responsible for causing a compile