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...ns because I don't want to modify all of the existing optimizations and I also don't want other users of the compiler to pay for this complexity. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130508/ad04dea8/attachment.html>

Jeff Bush <jeffbush001 at gmail.com> writes: > I'm trying to understand how predicated/masked instructions can be > generated in llvm, specifically an instruction where a set bit in the > mask will write the new result into the corresponding vector lane in > the destination and a clear bit will cause the lane in the destination > to remain what it was before the

I'm trying to understand how predicated/masked instructions can be generated in llvm, specifically an instruction where a set bit in the mask will write the new result into the corresponding vector lane in the destination and a clear bit will cause the lane in the destination to remain what it was before the instruction executed. I've seen a few places that suggest 'select' is the