search for: acr_v1

...e big refactoring occurs. It looks scary, but is really > just > moving code (and introducing the nvkm_acr structures). > > Patch 6, 7 and 8 remove a few HS hooks that turn out to be unneeded, and > add > support for LS hooks. > > The end result can be observed by looking at acr_v1_gm20b.c: all the > specifics > of GM20B's firmware are handled in a single file, with no data structures > shared > with acr_v1.c. The gm20b_acr_v1_ls_func variable also describes clearly > what > LS firmwares are to be loaded and how. > > Alexandre Courbot (8): > c...

...g its actual use. Patch 5 is where the big refactoring occurs. It looks scary, but is really just moving code (and introducing the nvkm_acr structures). Patch 6, 7 and 8 remove a few HS hooks that turn out to be unneeded, and add support for LS hooks. The end result can be observed by looking at acr_v1_gm20b.c: all the specifics of GM20B's firmware are handled in a single file, with no data structures shared with acr_v1.c. The gm20b_acr_v1_ls_func variable also describes clearly what LS firmwares are to be loaded and how. Alexandre Courbot (8): core: constify nv*_printk macros core: add...

Use the HS hook to completely generate the HS BL descriptor, similarly to what is done in the LS hook, instead of (arbitrarily) using the acr_v1 format as an intermediate. This allows us to make the bootloader descriptor structures private to each implementation, resulting in a cleaner an more consistent design. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/gm200.c | 177 +++++++++++++...

Sending things in a smaller chunks since it makes their reviewing easier. This part part 2/3 of the secboot refactoring/PMU command support patch series. Part 1 was the new falcon library which should be merged soon now. This series is mainly a refactoring/sanitization of the existing secure boot code. It does not add new features (part 3 will). Secure boot handling is now separated by NVIDIA

This is a rework of the secure boot code that moves the building of the blob into its own set of source files (and own hooks), making the code more flexible and (hopefully) easier to understand as well. This rework is needed to support more signed firmware for existing and new chips. Since the firmwares in question are not available yet I cannot send the code to manage then, but hopefully the

This is a rework of the secure boot code that moves the building of the blob into its own set of source files (and own hooks), making the code more flexible and (hopefully) easier to understand as well. This rework is needed to support more signed firmware for existing and new chips. Since the firmwares in question are not available yet I cannot send the code to manage then, but hopefully the

This revision includes initial signed PMU firmware support for GM20B (Tegra X1). This PMU code will also be used as a basis for dGPU signed PMU firmware support. With the PMU code, the refactoring of secure boot should also make more sense. ACR (secure boot) support is now separated by the driver version it originates from. This separation allows to run any version of the ACR on any chip,