Displaying 4 results from an estimated 4 matches for "acpi_viot_iort_virtio_pci_iommu".
2019 Nov 22
0
[RFC 06/13] ACPI/IORT: Support VIOT virtio-pci node
...MMU\n", type);
@@ -1451,6 +1464,28 @@ static void __init viommu_mmio_dma_configure(struct device *dev,
acpi_dma_configure(dev, attr);
}
+static __init struct iort_pci_devid *
+viommu_pci_get_devid(struct acpi_iort_node *node)
+{
+ unsigned int val;
+ struct iort_pci_devid *devid;
+ struct acpi_viot_iort_virtio_pci_iommu *viommu;
+
+ viommu = (struct acpi_viot_iort_virtio_pci_iommu *)node->node_data;
+
+ val = le32_to_cpu(viommu->devid);
+
+ devid = kzalloc(sizeof(*devid), GFP_KERNEL);
+ if (!devid)
+ return ERR_PTR(-ENOMEM);
+
+ devid->segment = val >> 16;
+ devid->bus = PCI_BUS_NUM(val);
+ devi...
2019 Nov 22
0
[RFC 02/13] ACPI: Add VIOT definitions
...*****************************************************/
+
+struct acpi_table_viot {
+ struct acpi_table_header header;
+ u8 reserved[12];
+ struct acpi_table_header base_table;
+};
+
+#define ACPI_VIOT_IORT_NODE_VIRTIO_PCI_IOMMU 0x80
+#define ACPI_VIOT_IORT_NODE_VIRTIO_MMIO_IOMMU 0x81
+
+struct acpi_viot_iort_virtio_pci_iommu {
+ u32 devid;
+};
+
+struct acpi_viot_iort_virtio_mmio_iommu {
+ u64 base_address;
+ u64 span;
+ u64 flags;
+ u64 interrupt;
+};
+
+/* FIXME: rename this monstrosity. */
+#define ACPI_VIOT_IORT_VIRTIO_MMIO_IOMMU_CACHE_COHERENT (1<<0)
+
/******************************************************...
2019 Nov 22
16
[RFC 00/13] virtio-iommu on non-devicetree platforms
I'm seeking feedback on multi-platform support for virtio-iommu. At the
moment only devicetree (DT) is supported and we don't have a pleasant
solution for other platforms. Once we figure out the topology
description, x86 support is trivial.
Since the IOMMU manages memory accesses from other devices, the guest
kernel needs to initialize the IOMMU before endpoints start issuing DMA.
2019 Nov 22
16
[RFC 00/13] virtio-iommu on non-devicetree platforms
I'm seeking feedback on multi-platform support for virtio-iommu. At the
moment only devicetree (DT) is supported and we don't have a pleasant
solution for other platforms. Once we figure out the topology
description, x86 support is trivial.
Since the IOMMU manages memory accesses from other devices, the guest
kernel needs to initialize the IOMMU before endpoints start issuing DMA.