Displaying 4 results from an estimated 4 matches for "acpi_table_viot".
2019 Nov 22
0
[RFC 11/13] ACPI: Add VIOT table
...cense-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2019 Linaro
+ *
+ * Virtual IOMMU table
+ */
+#define pr_fmt(fmt) "ACPI: VIOT: " fmt
+
+#include <linux/acpi.h>
+#include <linux/acpi_iort.h>
+#include <linux/acpi_viot.h>
+
+int __init acpi_viot_init(void)
+{
+ struct acpi_table_viot *viot;
+ struct acpi_table_header *acpi_header;
+ acpi_status status;
+
+ status = acpi_get_table(ACPI_SIG_VIOT, 0, &acpi_header);
+ if (ACPI_FAILURE(status)) {
+ if (status != AE_NOT_FOUND) {
+ const char *msg = acpi_format_exception(status);
+
+ pr_err("Failed to get table, %s\n&quo...
2019 Nov 22
0
[RFC 02/13] ACPI: Add VIOT definitions
...2,6 +413,36 @@ struct acpi_ivrs_memory {
u64 memory_length;
};
+/*******************************************************************************
+ *
+ * VIOT - Virtual I/O Table
+ * Version 1
+ *
+ ******************************************************************************/
+
+struct acpi_table_viot {
+ struct acpi_table_header header;
+ u8 reserved[12];
+ struct acpi_table_header base_table;
+};
+
+#define ACPI_VIOT_IORT_NODE_VIRTIO_PCI_IOMMU 0x80
+#define ACPI_VIOT_IORT_NODE_VIRTIO_MMIO_IOMMU 0x81
+
+struct acpi_viot_iort_virtio_pci_iommu {
+ u32 devid;
+};
+
+struct acpi_viot_iort_virt...
2019 Nov 22
16
[RFC 00/13] virtio-iommu on non-devicetree platforms
I'm seeking feedback on multi-platform support for virtio-iommu. At the
moment only devicetree (DT) is supported and we don't have a pleasant
solution for other platforms. Once we figure out the topology
description, x86 support is trivial.
Since the IOMMU manages memory accesses from other devices, the guest
kernel needs to initialize the IOMMU before endpoints start issuing DMA.
2019 Nov 22
16
[RFC 00/13] virtio-iommu on non-devicetree platforms
I'm seeking feedback on multi-platform support for virtio-iommu. At the
moment only devicetree (DT) is supported and we don't have a pleasant
solution for other platforms. Once we figure out the topology
description, x86 support is trivial.
Since the IOMMU manages memory accesses from other devices, the guest
kernel needs to initialize the IOMMU before endpoints start issuing DMA.