search for: acpi_pci_set_power_state

Displaying 20 results from an estimated 27 matches for "acpi_pci_set_power_state".

2019 Nov 21
5
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...t; > > be making specific assumptions on the configuration of the SoC and the > > > GPU at the time of its invocation which unfortunately are not known to > > > us. > > > > > > However, it looks like the AML invoked to power down the GPU from > > > acpi_pci_set_power_state() gets confused if it is not in PCI D0 at > > > that point, so it looks like that AML tries to access device memory on > > > the GPU (beyond the PCI config space) or similar which is not > > > accessible in PCI power states below D0. > > > > Or the PCI config...
2019 Nov 21
2
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...stom AML-based power management is involved and that may > be making specific assumptions on the configuration of the SoC and the > GPU at the time of its invocation which unfortunately are not known to > us. > > However, it looks like the AML invoked to power down the GPU from > acpi_pci_set_power_state() gets confused if it is not in PCI D0 at > that point, so it looks like that AML tries to access device memory on > the GPU (beyond the PCI config space) or similar which is not > accessible in PCI power states below D0. Or the PCI config space of the GPU when the parent root port is in...
2011 Feb 28
12
[RFC PATCH] set current_state to D0 in register_slot
...we do not set current_state because !pm_cap */ | do_pci_enable_device | pci_set_power_state | __pci_start_power_transition | pci_platform_power_transition /* platform_pci_power_manageable() calls acpi_pci_power_manageable that * returns true */ | platform_pci_set_power_state /* acpi_pci_set_power_state gets called and does nothing because the * acpi device has _EJ0, see the comment "If the ACPI device has _EJ0, * ignore the device" */ at this point if we refer to the commit message that introduced the comment above (10b3dcae0f275e2546e55303d64ddbb58cec7599), it is up to the hotplug...
2019 Nov 21
2
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...configuration of the SoC and the > > > > > GPU at the time of its invocation which unfortunately are not known to > > > > > us. > > > > > > > > > > However, it looks like the AML invoked to power down the GPU from > > > > > acpi_pci_set_power_state() gets confused if it is not in PCI D0 at > > > > > that point, so it looks like that AML tries to access device memory on > > > > > the GPU (beyond the PCI config space) or similar which is not > > > > > accessible in PCI power states below D0. > &gt...
2019 Oct 16
3
[PATCH v3] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...;-- nothing at all if quirked > pci_raw_set_power_state > pci_write_config_word(PCI_PM_CTRL, D3hot) <-- set to D3hot > __pci_complete_power_transition(D3cold) > pci_platform_power_transition(D3cold) > platform_pci_set_power_state(D3cold) > acpi_pci_set_power_state(D3cold) > acpi_device_set_power(ACPI_STATE_D3_COLD) > ... > acpi_evaluate_object("_OFF") <-- set to D3cold > > I did not understand the connection with platform (ACPI) power > management from your patch. It sounds like yo...
2019 Nov 21
1
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...ecific assumptions on the configuration of the SoC and the > > > > GPU at the time of its invocation which unfortunately are not known to > > > > us. > > > > > > > > However, it looks like the AML invoked to power down the GPU from > > > > acpi_pci_set_power_state() gets confused if it is not in PCI D0 at > > > > that point, so it looks like that AML tries to access device memory on > > > > the GPU (beyond the PCI config space) or similar which is not > > > > accessible in PCI power states below D0. > > > > &gt...
2019 Nov 20
2
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
On Wed, Nov 20, 2019 at 10:37 PM Rafael J. Wysocki <rafael at kernel.org> wrote: > > On Wed, Nov 20, 2019 at 4:53 PM Mika Westerberg > <mika.westerberg at intel.com> wrote: > > > > On Wed, Nov 20, 2019 at 04:37:14PM +0100, Karol Herbst wrote: > > > On Wed, Nov 20, 2019 at 4:15 PM Mika Westerberg > > > <mika.westerberg at intel.com> wrote:
2019 Nov 21
0
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...nt is involved and that may > > be making specific assumptions on the configuration of the SoC and the > > GPU at the time of its invocation which unfortunately are not known to > > us. > > > > However, it looks like the AML invoked to power down the GPU from > > acpi_pci_set_power_state() gets confused if it is not in PCI D0 at > > that point, so it looks like that AML tries to access device memory on > > the GPU (beyond the PCI config space) or similar which is not > > accessible in PCI power states below D0. > > Or the PCI config space of the GPU when the...
2013 Oct 08
1
[PATCH] drm/nouveau: suspend to D3hot, not to D3cold
In the autumn and winter it's considered bad form to set power state to D3cold, it might cause the device to freeze to death. This is also the case in the other seasons, so any device in the southern hemisphere is affected too. D3cold is not a valid state in a call to pci_set_power_state, only up to D3hot is allowed. Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com>
2019 Nov 21
3
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...and the > > > > > > GPU at the time of its invocation which unfortunately are not known to > > > > > > us. > > > > > > > > > > > > However, it looks like the AML invoked to power down the GPU from > > > > > > acpi_pci_set_power_state() gets confused if it is not in PCI D0 at > > > > > > that point, so it looks like that AML tries to access device memory on > > > > > > the GPU (beyond the PCI config space) or similar which is not > > > > > > accessible in PCI power states bel...
2019 Oct 21
0
[PATCH v3] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
..._power_state > > > pci_write_config_word(PCI_PM_CTRL, D3hot) <-- set to D3hot > > > __pci_complete_power_transition(D3cold) > > > pci_platform_power_transition(D3cold) > > > platform_pci_set_power_state(D3cold) > > > acpi_pci_set_power_state(D3cold) > > > acpi_device_set_power(ACPI_STATE_D3_COLD) > > > ... > > > acpi_evaluate_object("_OFF") <-- set to D3cold > > > > > > I did not understand the connection with platform (ACPI) power &...
2019 Nov 21
0
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...and the > > > > > > GPU at the time of its invocation which unfortunately are not known to > > > > > > us. > > > > > > > > > > > > However, it looks like the AML invoked to power down the GPU from > > > > > > acpi_pci_set_power_state() gets confused if it is not in PCI D0 at > > > > > > that point, so it looks like that AML tries to access device memory on > > > > > > the GPU (beyond the PCI config space) or similar which is not > > > > > > accessible in PCI power states bel...
2019 Nov 21
0
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...configuration of the SoC and the > > > > > GPU at the time of its invocation which unfortunately are not known to > > > > > us. > > > > > > > > > > However, it looks like the AML invoked to power down the GPU from > > > > > acpi_pci_set_power_state() gets confused if it is not in PCI D0 at > > > > > that point, so it looks like that AML tries to access device memory on > > > > > the GPU (beyond the PCI config space) or similar which is not > > > > > accessible in PCI power states below D0. > &gt...
2019 Oct 21
1
[PATCH v3] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...> > pci_raw_set_power_state > > pci_write_config_word(PCI_PM_CTRL, D3hot) <-- set to D3hot > > __pci_complete_power_transition(D3cold) > > pci_platform_power_transition(D3cold) > > platform_pci_set_power_state(D3cold) > > acpi_pci_set_power_state(D3cold) > > acpi_device_set_power(ACPI_STATE_D3_COLD) > > ... > > acpi_evaluate_object("_OFF") <-- set to D3cold > > > > I did not understand the connection with platform (ACPI) power > > management from...
2019 Nov 21
0
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...ecific assumptions on the configuration of the SoC and the > > > > GPU at the time of its invocation which unfortunately are not known to > > > > us. > > > > > > > > However, it looks like the AML invoked to power down the GPU from > > > > acpi_pci_set_power_state() gets confused if it is not in PCI D0 at > > > > that point, so it looks like that AML tries to access device memory on > > > > the GPU (beyond the PCI config space) or similar which is not > > > > accessible in PCI power states below D0. > > > > &gt...
2019 Nov 20
0
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...SoC may matter. Also some custom AML-based power management is involved and that may be making specific assumptions on the configuration of the SoC and the GPU at the time of its invocation which unfortunately are not known to us. However, it looks like the AML invoked to power down the GPU from acpi_pci_set_power_state() gets confused if it is not in PCI D0 at that point, so it looks like that AML tries to access device memory on the GPU (beyond the PCI config space) or similar which is not accessible in PCI power states below D0.
2019 Nov 21
0
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...configuration of the SoC and the > > > > > GPU at the time of its invocation which unfortunately are not known to > > > > > us. > > > > > > > > > > However, it looks like the AML invoked to power down the GPU from > > > > > acpi_pci_set_power_state() gets confused if it is not in PCI D0 at > > > > > that point, so it looks like that AML tries to access device memory on > > > > > the GPU (beyond the PCI config space) or similar which is not > > > > > accessible in PCI power states below D0. > &gt...
2019 Nov 21
2
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...PU at the time of its invocation which unfortunately are not known to > > > > > > > > us. > > > > > > > > > > > > > > > > However, it looks like the AML invoked to power down the GPU from > > > > > > > > acpi_pci_set_power_state() gets confused if it is not in PCI D0 at > > > > > > > > that point, so it looks like that AML tries to access device memory on > > > > > > > > the GPU (beyond the PCI config space) or similar which is not > > > > > > > > acce...
2019 Nov 22
3
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...PU at the time of its invocation which unfortunately are not known to > > > > > > > > us. > > > > > > > > > > > > > > > > However, it looks like the AML invoked to power down the GPU from > > > > > > > > acpi_pci_set_power_state() gets confused if it is not in PCI D0 at > > > > > > > > that point, so it looks like that AML tries to access device memory on > > > > > > > > the GPU (beyond the PCI config space) or similar which is not > > > > > > > > acce...
2019 Oct 16
2
[PATCH v3] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
but setting the PCI_DEV_FLAGS_NO_D3 flag does prevent using the platform means of putting the device into D3cold, right? That's actually what should still happen, just the D3hot step should be skipped. On Wed, Oct 16, 2019 at 9:14 PM Bjorn Helgaas <helgaas at kernel.org> wrote: > > On Wed, Oct 16, 2019 at 04:44:49PM +0200, Karol Herbst wrote: > > Fixes state transitions of