search for: acf6a6c9

Displaying 3 results from an estimated 3 matches for "acf6a6c9".

2013 Feb 21
0
[LLVMdev] Generate scalar SSE instructions instead of packed instructions
You can change the input LLVM-IR. On Feb 21, 2013, at 7:16 AM, "Nowicki, Tyler" <tyler.nowicki at intel.com> wrote: > Hi, > > I am interested in evaluating the performance of packed vs scalar double-precision floating point instructions on x86-atom and I was wondering if anyone knows more precisely where to modify llvm to use one or the other. I know I probably need
2013 Feb 21
2
[LLVMdev] Generate scalar SSE instructions instead of packed instructions
Hi, I am interested in evaluating the performance of packed vs scalar double-precision floating point instructions on x86-atom and I was wondering if anyone knows more precisely where to modify llvm to use one or the other. I know I probably need to change something in the type legalizer. Could anyone provide more details than that? Thanks, Tyler -------------- next part -------------- An HTML
2013 Feb 21
2
[LLVMdev] Generate scalar SSE instructions instead of packed instructions
...ss, I'm mainly interested in Interlagos and Sandybridge, so this conjecture may not hold for other processors such as Atom. Hope this helps, Cameron -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130221/acf6a6c9/attachment.html>