Displaying 11 results from an estimated 11 matches for "abi32".
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abin32
2013 Feb 04
2
[LLVMdev] Problem with PTX assembly printing (NVPTX backend)
...[13 x i8] c"Hello World!\00"
define i32 @main() nounwind {
%puts = tail call i32 @puts(i8* getelementptr inbounds ([13 x i8]*
@str, i32 0, i32 0))
ret i32 0
}
declare i32 @puts(i8* nocapture) nounwind
For instance, the "mips" target produces this:
.section .mdebug.abi32
.previous
.file "helloworld.ll"
.text
.globl main
.align 2
.type main, at function
.set nomips16 # @main
.ent main
main:
.frame $sp,24,$ra
.mask 0x80000000,-4
.fmask 0x00000000,0
.set noreorder
.set nomacro
.set noat
# BB#0:
lui $2, %hi(_gp_disp)
addiu $2,...
2012 Nov 11
2
[LLVMdev] Tracing nodes in selectionDAG to final code...
Hello everyone.
I use this command
clang -emit-llvm hello.c -c -o hello.bc
llc hello.bc -march=mipsel -relocation-model=static -o hello.s
to produce this MIPS code:
.section .mdebug.abi32
.previous
.file "hello.bc"
.text
.globl main
.align 2
.type main, at function
.set nomips16 # @main
.ent main
main:
.cfi_startproc
.frame $sp,32,$ra
.mask 0x80000000,-4
.fmask 0x00000000,0
.set noreorder
.set nomacro
# BB#0: # %entry
addiu $s...
2013 Feb 20
3
[LLVMdev] Is va_arg correct on Mips backend?
...Question:
Stack memory 28($sp) has no initial value. If this memory address is a relocation record which set value by linker/loader, then it maybe is correct.
clang -c ch8_3.cpp -emit-llvm -o ch8_3.bc
llc -march=mips -relocation-model=pic -filetype=asm ch8_3.bc -o ch8_3.mips.s
.section .mdebug.abi32
.previous
.file "ch8_3.bc"
.text
.globl _Z5sum_iiz
.align 2
.type _Z5sum_iiz, at function
.set nomips16 # @_Z5sum_iiz
.ent _Z5sum_iiz
_Z5sum_iiz:
.cfi_startproc
.frame $sp,64,$ra
.mask 0x80000000,-4
.fmask 0x00000000,0
.set noreorder
.set nomacro
.set noat
#...
2013 Feb 20
0
[LLVMdev] Is va_arg correct on Mips backend?
...itial value. If this memory address is a
> relocation record which set value by linker/loader, then it maybe is
> correct.
>
>
> clang -c ch8_3.cpp -emit-llvm -o ch8_3.bc
> llc -march=mips -relocation-model=pic -filetype=asm ch8_3.bc -o
> ch8_3.mips.s
>
> .section .mdebug.abi32
> .previous
> .file "ch8_3.bc"
> .text
> .globl _Z5sum_iiz
> .align 2
> .type _Z5sum_iiz, at function
> .set nomips16 # @_Z5sum_iiz
> .ent _Z5sum_iiz
> _Z5sum_iiz:
> .cfi_startproc
> .frame $sp,64,$ra
> .mask 0x80000000,-4
> .fmask 0x0...
2013 Feb 04
0
[LLVMdev] Problem with PTX assembly printing (NVPTX backend)
...ain() nounwind {
> %puts = tail call i32 @puts(i8* getelementptr inbounds ([13 x i8]* @str,
> i32 0, i32 0))
> ret i32 0
> }
>
> declare i32 @puts(i8* nocapture) nounwind
>
>
> For instance, the "mips" target produces this:
>
> .section .mdebug.abi32
> .previous
> .file "helloworld.ll"
> .text
> .globl main
> .align 2
> .type main, at function
> .set nomips16 # @main
> .ent main
> main:
> .frame $sp,24,$ra...
2013 Feb 19
0
[LLVMdev] Is va_arg correct on Mips backend?
Which part of the generated code do you think is not correct? Could you be
more specific?
I compiled this program with clang and ran it on a mips board. It returns
the expected result (21).
On Tue, Feb 19, 2013 at 4:15 AM, Jonathan <gamma_chen at yahoo.com.tw> wrote:
> I check the Mips backend for the following C code fragment compile result.
> It seems not correct. Is it my
2013 Feb 19
2
[LLVMdev] Is va_arg correct on Mips backend?
I check the Mips backend for the following C code fragment compile result. It seems not correct. Is it my misunderstand or it's a bug.
//ch8_3.cpp
#include <stdarg.h>
int sum_i(int amount, ...)
{
int i = 0;
int val = 0;
int sum = 0;
va_list vl;
va_start(vl, amount);
for (i = 0; i < amount; i++)
{
val = va_arg(vl, int);
sum += val;
}
va_end(vl);
2013 Feb 04
0
[LLVMdev] Problem with PTX assembly printing (NVPTX backend)
On Mon, Feb 4, 2013 at 1:09 PM, <nkavv at physics.auth.gr> wrote:
> Hi Justin,
>
>
> Has anyone had similar problems with the NVPTX backend? Shouldn't this
>>> code be linked to the AsmPrinter library for NVPTX (already)?
>>>
>>
>> What do you mean by "doesn't work"? The AsmPrinter library really houses
>> the MCInst
2016 Jun 24
7
Representing MIPS ABI information in the triple as ARM/X86 do for EABI/EABIHF/X32
...iants of Triple::GNU for each of these ABI's in the form of the Triple::GNUEABI, Triple::GNUEABIHF, and Triple::GNUX32 values of the environment component of the triple and it's up to the frontend and/or API-user to pass the right thing to the backend.
For MIPS, I'm defining Triple::GNUABI32, Triple::GNUABIN32, and Triple::GNUABI64. All three of these are supported by tools like binutils (by virtue of a wildcard match '*linux-gnu*') and of these three, Triple::GNUABI32 is not in general use, Triple::GNUABIN32 will be used by Debian if/when we do an N32 port, and Triple::GNUABI6...
2013 Feb 04
3
[LLVMdev] Problem with PTX assembly printing (NVPTX backend)
Hi Justin,
>> Has anyone had similar problems with the NVPTX backend? Shouldn't this
>> code be linked to the AsmPrinter library for NVPTX (already)?
>
> What do you mean by "doesn't work"? The AsmPrinter library really houses
> the MCInst printer, which isn't implemented for NVPTX yet. The older
> assembly printer works just fine. This is
2016 Jul 05
2
Representing MIPS ABI information in the triple as ARM/X86 do for EABI/EABIHF/X32
...iants of Triple::GNU for each of these ABI's in the form of the Triple::GNUEABI, Triple::GNUEABIHF, and Triple::GNUX32 values of the environment component of the triple and it's up to the frontend and/or API-user to pass the right thing to the backend.
For MIPS, I'm defining Triple::GNUABI32, Triple::GNUABIN32, and Triple::GNUABI64. All three of these are supported by tools like binutils (by virtue of a wildcard match '*linux-gnu*') and of these three, Triple::GNUABI32 is not in general use, Triple::GNUABIN32 will be used by Debian if/when we do an N32 port, and Triple::GNUABI6...