search for: aarch64subtarget

...In file included from PPCFrameLowering.h:17:0, from PPCTargetMachine.h:17, from PPCSelectionDAGInfo.cpp:15: PPCSubtarget.h:60:49: error: expected class-name before ‘{’ token PPCSubtarget.h:196:30: error: ‘RegClassVector’ has not been declared In file included from AArch64Subtarget.cpp:14:0: AArch64Subtarget.h:29:57: error: expected class-name before ‘{’ token PPCFrameLowering.h: In member function ‘virtual const llvm::TargetFrameLowering::SpillSlot* llvm::PPCFrameLowering::getCalleeSavedSpillSlots(unsigned int&) const’: PPCFrameLowering.h:138:51: error: ‘X31’ is not a m...

...b/lib/Target/AArch64/AArch64ISelLowering.cpp index 48f34c0..0feaa0d 100644 --- a/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -32,6 +32,8 @@ using namespace llvm; static TargetLoweringObjectFile *createTLOF(AArch64TargetMachine &TM) { const AArch64Subtarget *Subtarget = &TM.getSubtarget<AArch64Subtarget>(); + if (Subtarget->isTargetDarwin()) + return new AArch64MachOTargetObjectFile(); if (Subtarget->isTargetLinux()) return new AArch64LinuxTargetObjectFile(); if (Subtarget->isTargetELF()) @@ -41,9 +43,7 @@ static Ta...

Hi, while implementing SystemZTTI:getCacheSize(), it became clear that there really isn't a simple way to just ask the Subtarget for the current subtarget machine model. I was thinking like something of an enum that would also reflect the subtarget series (and would allow >= and similar operations). I would like to ask what the ideas are on how this should be done best. Some

...t > design doesn't capture heterogeneity at all, not because we're not > interested but simply because our compiler captures that at a higher > level outside of LLVM. AFAIK it is not handled at all. Any architecture that supports big.LITTLE will return 0 on getCacheLineSize(). See AArch64Subtarget::initializeProperties(). > > * write-back / write-through write buffers > > Do you mean for caches, or something else? https://en.wikipedia.org/wiki/Cache_%28computing%29#Writing_policies Basically, with write-though, every store is a non-temporal store (Or temporal stores being a...

Hi, When using Wine to run Windows ARM64 executables on Linux, there's one major ABI incompatibility between the two; Windows treats the x18 register as the reserved platform register, while it is free to be clobbered anywhere in code on Linux. The Wine code sets up this register before passing control over to the Windows executable code, but whenever the Windows code calls a function

Hi, thank you for sharing the system hierarchy model. IMHO it makes a lot of sense, although I don't know which of today's passes would make use of it. Here are my remarks. I am wondering how one could model the following features using this model, or whether they should be part of a performance model at all: * ARM's big.LITTLE * NUMA hierarchies (are the NUMA domains