search for: aarch64genregisterinfo

Displaying 3 results from an estimated 3 matches for "aarch64genregisterinfo".

2017 Sep 22
2
SchedClasses
...ALX instruction. The following program’s output is: name LDADDALX; class 872 microops 65535 I would have assumed that the microops are less than 20. The ThunderX2 has a detailed cost model for LSE. Could somebody tell me what I am doing wrong? Cheers, Tom #define GET_REGINFO_ENUM #include "AArch64GenRegisterInfo.inc" #define GET_INSTRINFO_ENUM #include "AArch64GenInstrInfo.inc" #define GET_SUBTARGETINFO_ENUM #include "AArch64GenSubtargetInfo.inc" #include "llvm/MC/MCSchedule.h" #include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCInstrDesc.h" #in...
2017 Sep 29
0
SchedClasses
...put is: > name LDADDALX; class 872 > microops 65535 > I would have assumed that the microops are less than 20. The ThunderX2 has a detailed cost model for LSE. Could somebody tell me what I am doing wrong? > > Cheers, > Tom > > #define GET_REGINFO_ENUM > #include "AArch64GenRegisterInfo.inc" > > #define GET_INSTRINFO_ENUM > #include "AArch64GenInstrInfo.inc" > > #define GET_SUBTARGETINFO_ENUM > #include "AArch64GenSubtargetInfo.inc" > > #include "llvm/MC/MCSchedule.h" > #include "llvm/MC/MCRegisterInfo.h" &...
2017 Sep 30
1
SchedClasses
...2017 at 7:51 PM, Andrew Trick via llvm-dev < llvm-dev at lists.llvm.org> wrote: > > > > On Sep 22, 2017, at 10:34 AM, Thorsten Schütt via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > > > > > > > #define GET_REGINFO_ENUM > > #include "AArch64GenRegisterInfo.inc" > > > > #define GET_INSTRINFO_ENUM > > #include "AArch64GenInstrInfo.inc" > > > > #define GET_SUBTARGETINFO_ENUM > > #include "AArch64GenSubtargetInfo.inc" > > > > #include "llvm/MC/MCSchedule.h" > > #incl...