search for: aapc

...wrote: >> >> [snip] >> >>> One example is the struct byval. The ARM back-end still doesn't >>> support struct byval (maybe now it does, I was away for a while), >> >> The ARM backend now supports struct byval for APCS. Extending it to support AAPCS shouldn't be too difficult. Alas, I won't have time to revisit this in the near future. > > It's slightly unclear to me what byval means for an ABI that passes > some structs in registers, such as AAPCS-VFP. IIUC, the byval attribute on a pointer to a structure means "...

...andard. According to this d0-d7, d16-d31 are scratch registers. The situation is slightly different for __aeabi_memcpy (). The ABI spec explicitly states: "In general, implementations of these functions are allowed to corrupt only the integer core registers permitted to be corrupted by the [AAPCS] (r0-r3, ip, lr, and CPSR)." newlib addresses this by explicitly providing a separate implementation for __aeabi_memcpy () and memcpy (). But things can get messed up if compiler-rt's __aeabi_memcpy () is actually used. (with any memcpy () that clobbers flating-point registers.) The...

Hi all, I was wondering if ARM aapcs calling convention defines how to pass small vectors as parameter to a routine. By small vectors, I mean with size less than a 32-bit integer. For instance if we consider following code: ; ModuleID = 'smallvect.ll' define arm_aapcscc void @foo(<2 x i8>* %p) { L.entry: %0 = load...

On 07/16/2014 11:45 AM, Tim Northover wrote: >>> As has been mentioned several times (*), LLVM and GCC setup frame pointer to >> point to different stack slots on ARM. GCC's fp points to stack slot holding >> lr while LLVM's fp points at the next slot. > > This looks flipped from my tests. Both create an { fp, lr } struct; > GCC sets current fp to the address

On 12 May 2011 15:43, Stuart Hastings <stuart at apple.com> wrote: > I'm not familiar with AAPCS-VFP, but I'd assume that any byval struct should be passed by value, as if byval didn't exist. Not if the argument(s) fits into the specified registers. There's where the ABI comes in. In a nutshell, the AAPCS-VFP extends the AAPCS to include cases where the arguments are floating po...

On May 9, 2011, at 1:41 PM, Renato Golin wrote: [snip] > One example is the struct byval. The ARM back-end still doesn't > support struct byval (maybe now it does, I was away for a while), The ARM backend now supports struct byval for APCS. Extending it to support AAPCS shouldn't be too difficult. Alas, I won't have time to revisit this in the near future. stuart

> Chandler’s complex arithmetic changes are also in the range: r219557 in clang. We saw it change the code in mandel-2 significantly. mandel-2 is broken on hard FP ABI systems, btw. The reason is simply: we're emitting a call to __muldc3 with AAPCS VFP calling convention, however, the function expects softfp (AAPCS) calling conv and reads garbage from GP registers. I'm working on fix. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University

...the remote computer(s) I am having to put a route statement in. Home network is 10.10.1.0/24 and I have statically assigned 10.10.10.x/24 addresses for all of the tinc adapters. This is the config of the host that is the "gateway" to my home machine. ====================== /tinc/hosts/aapc ====================== Address = 74.13x.4x.1x Subnet = 10.10.1.0/24 Subnet = 10.10.10.101/32 -----BEGIN RSA PUBLIC KEY----- xxx -----END RSA PUBLIC KEY----- ====================== /tinc/hosts/aapc ====================== On the remote machine I have an "up" script to add the route - but...

...2011, at 1:41 PM, Renato Golin wrote: > > [snip] > >> One example is the struct byval. The ARM back-end still doesn't >> support struct byval (maybe now it does, I was away for a while), > > The ARM backend now supports struct byval for APCS.  Extending it to support AAPCS shouldn't be too difficult.  Alas, I won't have time to revisit this in the near future. It's slightly unclear to me what byval means for an ABI that passes some structs in registers, such as AAPCS-VFP. deep

> I was wondering if ARM aapcs calling convention defines how to pass small vectors as parameter to a routine. > By small vectors, I mean with size less than a 32-bit integer. The AAPCS is silent on the matter. Vectors with size <= 32 aren't recognised by the PCS so a language wanting to support them with well-define...

...wrote: > >> > Chandler’s complex arithmetic changes are also in the range: r219557 >> in clang. We saw it change the code in mandel-2 significantly. >> mandel-2 is broken on hard FP ABI systems, btw. The reason is simply: >> we're emitting a call to __muldc3 with AAPCS VFP calling convention, >> however, the function expects softfp (AAPCS) calling conv and reads >> garbage from GP registers. >> >> I'm working on fix. > > > Thanks for looking at this Anton. > > I don't really know what signal should be used here. Sev...

...rch 2017 at 02:33, Saleem Abdulrasool <compnerd at compnerd.org> wrote: > sin/cos are libm functions, and so a libcall to those need to honour the > floating point ABI requests. The calling convention to be followed there > should match `-mfloat-abi` (that is, -mfloat-abi=hard => AAPCS/VFP, > -mfloat-abi=soft => AAPCS). Exactly, but they're not, and that's the problem. Do you have any idea why -ffast-math would change their PCS for libc calls? The behaviour seems to have been by your patch (https://reviews.llvm.org/rL291909), so maybe there's some transformat...

...d persuade > > people that this is worth changing. > > So, this is a lot more complicated than it seems and the choice was > not arbitrary. > > The old APCS required the frame pointer to be pointing to LR in the > stack, and due to the number of problems that it created [1], AAPCS > said "we're having none of it". With that in mind, the GCC engineers > didn't change the FP logic when they implemented AAPCS. The AArch64 > AAPCS had a better description of what to do with the FP, and since it > was a new target, both GCC and LLVM engineers decide...

...LF stack pointer register contains not a 8-bytes aligned address. > > Ah, that could do it. I see that LLVM does indeed make use of stack > alignment in this case. Regardless, this approach is going to go > really badly. > > By default almost all ELF platforms use an ABI called AAPCS (either > hard or soft float). iOS uses an older ABI called APCS. You can't mix > code from these two worlds in any kind of non-trivial case without a > translation layer. Do you mean translation layer in loader. If so, loader could replace any ELF invocation by stub function invocati...

Hi Sandeep, On 17 September 2010 18:52, Sandeep Patel <deeppatel1987 at gmail.com> wrote: > * Only these few renamed libcalls are set as AAPCS because other > libcalls may still want to be AAPCS-VFP. Even the F32 ones? Anton, As discussed, we might better put the FP helpers first, then deal with the REM and Memset later. If Sandeep's patch passes all tests, you can apply that and I'll merge to our changes later. If we have...

...issue found during the NetBSD/ARM tests is the following. Consider this input for EARM: int f(int a, int b) { return a % b; } unsigned int g(unsigned int a, unsigned int b) { return a % b; } At the moment, this will call __modsi3 and __umodsi3, even though those functions are not part of AAPCS. Should this be considered a lowering bug in the ARM target? Joerg

On Jun 24, 2011, at 12:52 PM, Alasdair Grant wrote: >> Both NetBSD and FreeBSD seems to use older ATPCS ABI standard. >> As I can see it is not supported in LLVM. >> >> Seems that ATPCS is predecessor of AAPCS so I wonder how easy is >> to implement it in LLVM/Clang... >> >> Is it worth efforts? Any thoughts? > > See http://gcc.gnu.org/ml/gcc/2010-05/msg00468.html : > > "Do they still want their OS to work on modern CPUs with any > degree of efficiency? The c...

...tackrealign, but it wasn't lead to 8-bytes aligned stack, I mean sp wasn't aligned to 0x.....0/8, as well as address of structure on the stack. Also I tried -mstrict-align. So I assume, somewhere should be patches for llvm, which could do it ) I not yet tested some __attribute__((pcs("aapcs")))/-target-abi, maybe there is magic pcs attribute, and I could apply it for dangerous function, but I would prefer to solve that problem in general. > > Do you have a self-contained example (code, compiler version & command > line flags)? > > Cheers. > > Tim. Best...

On Dec 18, 2008, at 7:05 PM, Sandeep Patel wrote: > Since there have been no answers, I will have to start at the > beginning. > > One of the first changes I'd like to try is adding the additional > registers and the AAPCS VFP variant calling conventions. Is there a > reason why the ARM Target isn't using the CCState machinery? Please clarify. I am not sure what you mean by CCState machinery. Evan > > > Deep > > On Fri, Dec 5, 2008 at 5:22 PM, Sandeep Patel > <deeppatel1987 at gmail....

...to review & commit I have split and cleaned-up our > original > "Support for ARM Run-Time ABI" patch, this part adds support for calls which > > can be mapped using setLibcallName. As noted in the earlier thread on this, I'm pretty sure that we need to only apply the AAPCS calling convention to exactly the set of libcalls that you're adding here. Other libcalls outside this set should use the "native" calling convention such as AAPCS-VFP. deep