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2011 Mar 22
5
FPGA encode stages flow diagram
...day! I create diagram of encoder process. Using it i create implementation of encoder in FPGA (Xilinx/Altera). Please critique it. Is there missing stages? Here is blog http://developer-fpga.blogspot.com/ Here is picture of encoding stage 1 https://lh4.googleusercontent.com/-NV8o9DG3jvE/TYjYXr-dYGI/AAAAAAAAAos/U06O-YvhSI0/s1600/stage1.jpg Here is picture of encoding stage 2 https://lh5.googleusercontent.com/--1U5TaiVAEU/TYjYhW4n2OI/AAAAAAAAAow/vRFbzObFhww/s1600/stage2.jpg -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.xiph.org/pipermail/theora-dev/attachments...
2011 Mar 22
2
theora-dev Digest, Vol 80, Issue 6
...er process. Using it i create implementation of > encoder in FPGA (Xilinx/Altera). Please critique it. Is there missing > stages? > Here is blog http://developer-fpga.blogspot.com/ > Here is picture of encoding stage 1 > > https://lh4.googleusercontent.com/-NV8o9DG3jvE/TYjYXr-dYGI/AAAAAAAAAos/U06O-YvhSI0/s1600/stage1.jpg > Here is picture of encoding stage 2 > > https://lh5.googleusercontent.com/--1U5TaiVAEU/TYjYhW4n2OI/AAAAAAAAAow/vRFbzObFhww/s1600/stage2.jpg > -------------- next part -------------- > An HTML attachment was scrubbed... > URL: > http://lists.xiph.o...