Displaying 19 results from an estimated 19 matches for "a_addr".
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2012 Sep 21
3
[LLVMdev] Alias Analysis accuracy
...d @foo(i32* noalias %a, i32* noalias %b, i32* noalias %c) nounwind
> {
>
> Now the AA result:
> Function: foo: 13 pointers, 0 call sites
> NoAlias: i32* %a, i32* %b
> NoAlias: i32* %a, i32* %c
> NoAlias: i32* %b, i32* %c
> NoAlias: i32* %a, i32** %a_addr
> NoAlias: i32* %b, i32** %a_addr
> NoAlias: i32* %c, i32** %a_addr
> NoAlias: i32* %a, i32** %b_addr
> NoAlias: i32* %b, i32** %b_addr
> NoAlias: i32* %c, i32** %b_addr
> NoAlias: i32** %a_addr, i32** %b_addr
> NoAlias: i32* %a,...
2012 Sep 21
0
[LLVMdev] Alias Analysis accuracy
...function signature becomes:
define void @foo(i32* noalias %a, i32* noalias %b, i32* noalias %c)
nounwind {
Now the AA result:
Function: foo: 13 pointers, 0 call sites
NoAlias: i32* %a, i32* %b
NoAlias: i32* %a, i32* %c
NoAlias: i32* %b, i32* %c
NoAlias: i32* %a, i32** %a_addr
NoAlias: i32* %b, i32** %a_addr
NoAlias: i32* %c, i32** %a_addr
NoAlias: i32* %a, i32** %b_addr
NoAlias: i32* %b, i32** %b_addr
NoAlias: i32* %c, i32** %b_addr
NoAlias: i32** %a_addr, i32** %b_addr
NoAlias: i32* %a, i32** %c_addr
NoAlias: i32*...
2012 Sep 21
0
[LLVMdev] Alias Analysis accuracy
...noalias %c)
> nounwind
> > {
> >
> > Now the AA result:
> > Function: foo: 13 pointers, 0 call sites
> > NoAlias: i32* %a, i32* %b
> > NoAlias: i32* %a, i32* %c
> > NoAlias: i32* %b, i32* %c
> > NoAlias: i32* %a, i32** %a_addr
> > NoAlias: i32* %b, i32** %a_addr
> > NoAlias: i32* %c, i32** %a_addr
> > NoAlias: i32* %a, i32** %b_addr
> > NoAlias: i32* %b, i32** %b_addr
> > NoAlias: i32* %c, i32** %b_addr
> > NoAlias: i32** %a_addr, i32** %b_addr...
2012 Sep 21
3
[LLVMdev] Alias Analysis accuracy
Can you give an example? And is this limited to C (not C++) only?
On Fri, Sep 21, 2012 at 2:52 PM, Liu, Yaxun (Sam) <Yaxun.Liu at amd.com> wrote:
> I think you may add restrict type qualifier.****
>
> ** **
>
> Sam****
>
> ** **
>
> *From:* llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] *On
> Behalf Of *Welson Sun
> *Sent:* Friday,
2010 Sep 23
3
[LLVMdev] where does %a_addr.0 come from?
...e the
phi nodes in the llvm ir output. I learned then to use this command:
opt -mem2reg test.ll -S > test_mem2reg.ll
However, if you look at the output (attached to this message) there is
something I do not understand. At the end of the function @f at line 18,
the function returns the variable %a_addr.0. However, this variable is
never defined or set. The variable %a is. Is "_addr.0" a way to get the
address of a variable? I could not find anything about this in in LLVM
language reference manual.
Where does this variable come from?
thanks,
Maarten Faddegon
-------------- next part...
2010 Sep 23
0
[LLVMdev] where does %a_addr.0 come from?
Hi Maarten,
If you look at the start of basic block 2 (bb2) you'll see the
following instruction:
%a_addr.0 = phi i32 [ 1, %bb ], [ 0, %bb1 ] ; <i32> [#uses=1]
This is an SSA phi node which assigns a value of either 1 or 0 to %a_addr.0
depending on whether control reached the PHI node from basic block bb, or
bb1.
- Lang.
On Thu, Sep 23, 2010 at 11:26 PM, maarten faddegon <
m.faddegon at...
2012 Sep 21
3
[LLVMdev] Alias Analysis accuracy
...out =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-f128:128:128-n8:16:32:64"
target triple = "x86_64-unknown-linux-gnu"
define void @_Z3fooPiS_S_(i32* %a, i32* %b, i32* %c) nounwind {
entry:
%a_addr = alloca i32*, align 8
%b_addr = alloca i32*, align 8
%c_addr = alloca i32*, align 8
%i = alloca i32
%"alloca point" = bitcast i32 0 to i32
store i32* %a, i32** %a_addr
store i32* %b, i32** %b_addr
store i32* %c, i32** %c_addr
store i32 0, i32* %i, align 4
br label %bb1...
2008 Jun 28
2
[LLVMdev] need to store the address of a variable
...<i32**> [#uses=26]
%store_tmp1 = getelementptr i32** %minPos_pointerArray, i32 1 ; <i32**> ...
But I could not find a way to get a pointer to a given variable.
When I translate the following C Code with llvm-gcc
int a;
int* d;
d = &a;
to LLVM I get the following LLVM Code
%a_addr = alloca i32 ; <i32*> [#uses=2]
%d = alloca i32* ; <i32**> [#uses=2]
store i32 %a, i32* %a_addr
store i32* %a_addr, i32** %d, align 4
how can I generate such an Instruction?
When I use
name = variables.inst[i]->getName() + "address_";
Instruction *AD = new A...
2008 Jun 28
0
[LLVMdev] need to store the address of a variable
...think what you're saying is that you want a pointer to a given C
variable, not a given LLVM variable, which is certainly possible.
> When I translate the following C Code with llvm-gcc
>
> int a;
> int* d;
> d = &a;
>
> to LLVM I get the following LLVM Code
>
> %a_addr = alloca i32 ; <i32*> [#uses=2]
> %d = alloca i32* ; <i32**> [#uses=2]
> store i32 %a, i32* %a_addr
> store i32* %a_addr, i32** %d, align 4
>
> how can I generate such an Instruction?
>
In general, what you can do is take that code:
define void @foo(i3...
2011 Jul 15
2
[LLVMdev] Missing optimization in constant propagation?
...if I oversee anything or if it's a missing feature.
I have created the following simple test function in C:
int times_zero(int a)
{
return (a * 0);
}
Compiling this with GCC using dragonegg generates the following code:
%int = type i32
define i32 @times_zero(i32 %a) nounwind {
entry:
%a_addr = alloca i32, align 4
%memtmp = alloca i32
%"alloca point" = bitcast i32 0 to i32
store i32 %a, i32* %a_addr
%"ssa point" = bitcast i32 0 to i32
br label %"2"
"2": ; preds = %entry
store i32 0, i32* %m...
2011 Jul 15
0
[LLVMdev] Missing optimization in constant propagation?
...have created the following simple test function in C:
>
> int times_zero(int a)
> {
> return (a * 0);
> }
>
> Compiling this with GCC using dragonegg generates the following code:
>
> %int = type i32
>
> define i32 @times_zero(i32 %a) nounwind {
> entry:
> %a_addr = alloca i32, align 4
> %memtmp = alloca i32
> %"alloca point" = bitcast i32 0 to i32
> store i32 %a, i32* %a_addr
> %"ssa point" = bitcast i32 0 to i32
> br label %"2"
>
> "2": ; preds =...
2010 Jan 29
2
[LLVMdev] 64bit MRV problem: { float, float, float} -> { double, float }
...%2, float* %resX, align 4
store float %tmp10.i, float* %resY, align 4
store float %0, float* %resZ, align 4
ret void
}
llvm-gcc4.2-2.5 generates the following code for the same example:
define void @test(double %a.0, float %a.1, %struct.float3* nocapture
%res) nounwind noinline {
entry:
%a_addr = alloca %struct.float3, align 8 ; <%struct.float3*>
[#uses=3]
%0 = bitcast %struct.float3* %a_addr to double* ; <double*> [#uses=1]
store double %a.0, double* %0
%1 = getelementptr %struct.float3* %a_addr, i64 0, i32 2 ; <float*>
[#uses=1]
store float %a.1, float*...
2010 Jan 25
0
[LLVMdev] 64bit MRV problem: { float, float, float} -> { double, float }
Hi Ralf,
> I do not understand why this behaviour is required. What is the problem
> in having a function receive a single struct-parameter with three floats
> compared to two scalar parameters?
>
> source-code (C++):
> struct Test3Float { float a, b, c; };
> void test(Test3Float param, Test3Float* result) { ... }
if you compile this with GCC, you will see that it too
2010 Jan 25
2
[LLVMdev] 64bit MRV problem: { float, float, float} -> { double, float }
Uh, sorry, did not pay attention where I was replying ;)
Hey Duncan,
I do not understand why this behaviour is required. What is the problem
in having a function receive a single struct-parameter with three floats
compared to two scalar parameters?
source-code (C++):
struct Test3Float { float a, b, c; };
void test(Test3Float param, Test3Float* result) { ... }
bitcode:
2007 Jul 09
2
[LLVMdev] AsmParser fails
...o i32 ; <i32> [#uses=0]
store i32 5, i32* %tmp
%tmp1 = load i32* %tmp ; <i32> [#uses=1]
store i32 %tmp1, i32* %retval
br label %return
return: ; preds = %entry
%retval2 = load i32* %retval ; <i32> [#uses=1]
ret i32 %retval2
}
define i32 @common_func2(i32 %a) {
entry:
%a_addr = alloca i32 ; <i32*> [#uses=2]
%retval = alloca i32, align 4 ; <i32*> [#uses=2]
%tmp = alloca i32, align 4 ; <i32*> [#uses=2]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
store i32 %a, i32* %a_addr
%tmp1 = load i32* %a_addr ; <i32> [#us...
2011 Nov 03
5
[LLVMdev] LLVM problem, please do not ignore
...ommands and
gives some statstics.
Nevertheless, I get this segmentation fault:
................some rows about functions, that are not changed by my pass.
The errors occurs after it has modified a "@_Z3addii" function.
store i32 %b.0, i32* %4 and the type is ddddbbm 28
%5 = load i32* %a_addr, align 4 and the type is ddddbbm 27
%6 = load i32* %b_addr, align 4 and the type is ddddbbm 27
%7 = add nsw i32 %5, %6 and the type is ddddbbm 8
store i32 %7, i32* %0, align 4 and the type is ddddbbm 28
%7 = add nsw i32 %5, %6 is erased, ba!
%7 = load i32* %0, align 4 and the type...
2011 Jan 06
0
[LLVMdev] Null address pointer in llvm.dbg.declare
...contains the correct information (name of the
variable, etc...), getAddress always returns NULL. Am I missing
something, or is there some other way to access the variable being
declared?
NB: this happens when processing the following bitcode:
define i32 @fun(i32 %a, float %b) nounwind {
entry:
%a_addr = alloca i32, align 4
%b_addr = alloca float, align 4
%retval = alloca i32
%0 = alloca i32
%"alloca point" = bitcast i32 0 to i32
call void @llvm.dbg.declare(metadata !{i32* %a_addr}, metadata !8), !
dbg !9
...
!8 = metadata !{i32 524545, metadata !4, metadata !"a",...
2011 Nov 03
0
[LLVMdev] LLVM problem, please do not ignore
...;re going to be developing an LLVM pass.
-- John T.
>
> ................some rows about functions, that are not changed by my
> pass. The errors occurs after it has modified a "@_Z3addii" function.
> store i32 %b.0, i32* %4 and the type is ddddbbm 28
> %5 = load i32* %a_addr, align 4 and the type is ddddbbm 27
> %6 = load i32* %b_addr, align 4 and the type is ddddbbm 27
> %7 = add nsw i32 %5, %6 and the type is ddddbbm 8
> store i32 %7, i32* %0, align 4 and the type is ddddbbm 28
> %7 = add nsw i32 %5, %6 is erased, ba!
> %7 = load i32* %...
2008 Jun 10
3
[LLVMdev] DejaGNU test fixes
...p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
target triple = "i386-pc-linux-gnu"
%struct..0anon = type { i32 }
%struct..1anon = type { [1 x i32] }
define i32 @f(i32 %a, %struct..0anon* %c) nounwind {
entry:
%a_addr = alloca i32 ; <i32*> [#uses=2]
%retval = alloca i32 ; <i32*> [#uses=2]
%tmp = alloca i32 ; <i32*> [#uses=2]
%a.0 = alloca i32 ; <i32*> [#uses=8]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
store i32 %a, i32* %a_addr
%tmp1 = load i32*...