search for: a8

...int ops (specifically floating point multiplication), performance with clang was bad. On analyzing further those issues, i came across vmla instruction by gcc. The test cases hit by bad performance of clang are : Test Case No of vmla instructions emitted by gcc (clang does not emit vmla for cortex-a8) =========== ======================================================= llvm/projects/test-suite/SingleSource/Benchmarks/Misc-C++/Large/sphereflake 55 llvm/projects/test-suite/SingleSource/Benchmarks/Misc-C++/Large/ray.cpp 40 llvm/projects/test-suite/SingleSource/Benchmarks/Misc/ffbench.c 8 llvm...

Motivation At the moment, when targeting armv7a, clang defaults to generate code as if -mcpu=cortex-a8 was specified. When targeting armv8a, it defaults to generate code as if -mcpu=cortex-a53 was specified. This leads to surprising code generation, by the compiler optimizing for a specific micro-architecture, whereas the intent from the user was probably to generate code that is "blended&quot...

Hi all, I would like to call from SIP client to Asterisk then GnuGk, then Cisco 5300 to PSTN phone. Is this possible? I need simple config asterisk and gnugk.Can somebody help me? Ganbaa -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.digium.com/pipermail/asterisk-users/attachments/20040629/cfe09e1e/attachment.htm

Hi all, Thanks for the info. Few observations from my side : LLVM : cortex-a8 vfpv3 : no vmla or vfma instruction emitted cortex-a8 vfpv4 : no vmla or vfma instruction emitted (This is invalid though as cortex-a8 does not have vfpv4) cortex-a8 vfpv4 with ffp-contract=fast : vfma instruction emitted ( this seems a bug to me!! If cortex-a8 doesn't come with vfpv4 then vf...

Thanks for everyone giving their feedback! I saw pretty unanimous support for making -mcpu=generic the default and making -mcpu=generic schedule for an in-order CPU (Cortex-A8 in this case). I'll be making those changes shortly. I think the comments also make clear that it's less obvious whether we'd want -mcpu=native to become a default. It's probably good for some use cases, but really not good for other use cases. I won't be making that change, no...

...en to ARM with virt extensions are best posted to xen-devel, the xen-arm list focuses on the PV port. Adding xen-devel since it seems you are mainly asking about the w/-virt-extensions port. On Fri, 2012-05-18 at 12:38 +0100, Krishna Pavan wrote: > Please inform the status of Xen-ARM for Cortex-A8 CPU''s on FME from > ARM. AFAIK no one has tried the w/-virt-extensions port on this model. The only ones which I know have been tried are Cortex-A15 model and AEM. Cortex-A8 already exists so I would be surprised if it were to be updated with virt extensions, do you have some reason t...

I suspect that my llvm-gcc cross compiler is using the wrong assembler because it does not recognize "-mcpu=cortex-a8". I was trying to build a cross compiler for a Mac host. Now I am trying to build on x86_64 Linux. I am targeting a Beagle board with an ARM Cortex-A8 and Angstrom Linux. TRIED: to use the script in llvm/utils/crosstool/ARM/build-install-linux.sh I used the recommended version of CodeSourcer...

Turns out we used a misaligned long instruction near the end, and the shader was getting killed after writing R, A components. This has gone unnoticed since the remaining G, B outputs aren't actually used. --- src/nv50_accel.c | 5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) diff --git a/src/nv50_accel.c b/src/nv50_accel.c index 5fa539c..1218e18 100644 --- a/src/nv50_accel.c

Hi. Red Hat is saying that AMD Liano A8 CPU's are not supported by RHEL/CentOS 6: https://access.redhat.com/knowledge/articles/65431 Is that true? What can I expect if I try to install CentOS 6.3 on PC with that CPU? -- Ljubomir Ljubojevic (Love is in the Air) PL Computers Serbia, Europe Google is the Mother, Google is the Fa...

...f you only look at the benchmark you're tuning to, you'll never see it. It may be that the cost is small and that we decide to pay the price, but not until we know that the cost is. This was tested on real hardware. Time taken for a 4x4 matrix > multiplication: > What hardware? A7? A8? A9? A15? Also, as stated by Renato - "there is a pipeline stall between two > sequential VMLAs (possibly due to the need of re-use of some registers) and > this made code much slower than a sequence of VMLA+VMUL+VADD" , when i use > -mcpu=cortex-a15 as option, clang emits vmla...

If this is the wrong list, please correct me, thanks. I'm trying to get a bit more information about the Arm backend for llvm. The precise processor I'm interested in is the TI OMAP3530 (the Cortex-A8 is the main CPU, along with other processors onboard the chip). I did see that the backend for Arm has support for the V6, but I'm thinking (I could be wrong) that the Cortex-A8 is more V7 compatible. So, I was wondering if the LLVM would be available to me for my project, and if it's not...

...a 4.2 (Debian Jessie) tdbdump gives a working password such as this: ]f2>lOR4NA~hbv\00 where the actual password is ]f2>lOR4NA~hbv On newer machines running Samba 4.5 (Debian Stretch) tdbdump gives an encrypted password such as this: \EE\A9\8D\EF\AD\AC\E2\A1\9D\E2\A0\8C\E3\96\8E\E7\B0\A8\EE\97\AA\E2\8E\9F\E2\A2\8F\EB\85\BF\EE\B7\8B\EA\A7\A9\EA\97\B8\D2\86\E6\83\AB\EE\82\AA\E3\A9\BB\E3\8A\8D\E2\86\9B\E2\8C\92\E6\8C\A6\EA\85\A5\E6\8F\82\EF\96\94\EF\9C\82\E7\8D\B3\E7\8F\93\E7\B8\AA\E7\A7\B7\EE\88\96\E2\A3\9B\EB\AA\B0\E6\B6\A7\EF\B6\B7\EA\A2\AD\EF\A8\88\EA\BB\B6\EE\A4\9A\E3\99\A6\EE\93...

...anges to make it a 3x3 matrix multiplication for making things simple to understand . clang version : trunk version (latest as of today 19 Dec 2013) GCC version : 4.5 (i checked with 4.8 as well) flags passed to both gcc and clang : -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -mcpu=cortex-a8 Optimization level used : O3 No vmla instruction emitted by clang but GCC happily emits it. This was tested on real hardware. Time taken for a 4x4 matrix multiplication: clang : ~14 secs gcc : ~9 secs Time taken for a 3x3 matrix multiplication: clang : ~6.5 secs gcc : ~5 secs when flag -mc...

> cortex-a8 vfpv4 with ffp-contract=fast : vfma instruction emitted ( this > seems a bug to me!! If cortex-a8 doesn't come with vfpv4 then vfma > instructions generated will be invalid ) If I'm understanding correctly, you've specifically told it this Cortex-A8 *does* come with vfpv4. Those...

...(UML) machines. The bridge lets ARP traffic through, but not the IP traffic. linux:~ # brctl showmacs br0 port no mac addr is local? ageing timer 2 00:ff:7d:86:06:47 yes 0.00 3 00:ff:bc:de:07:76 yes 0.00 2 fe:fd:c0:a8:00:03 no 0.29 3 fe:fd:c0:a8:00:04 no 8.36 The last 2 are the UML machines. Using ebtables on the host with the bridge I can see that the IP packets go upto the FORWARD chain in both ebtables and iptables after which they seem to disappear. ARP p...

On Jul 2, 2009, at 6:24 PM, Neel Nagar wrote: > I suspect that my llvm-gcc cross compiler is using the wrong > assembler because it does not recognize "-mcpu=cortex-a8". This is a known problem. We've only added support for ARMv7 (including cortex-a8) in llvm in the last week or so, and the associated changes for llvm-gcc are still pending. Unless you need specific features of your cortex-a8 processor, you should be able to make progress getti...

I am currently working on support for the Cortex-A9, but as all compiler testing is more easily done on an Cortex-A8 today, A8 support is implicit. What specific ISA changes are you most interested in? Are you able to develop patches if we coordinate which areas to work on? deep On Wed, May 20, 2009 at 12:19 PM, Chuck Robey <chuckr at telenix.org> wrote: > If this is the wrong list, please correct me,...

hi My host is Linux on x86, and I want llvm-gcc generate code for Arm Cortex-A8. I saw that in LLVM 2.7 Release Notes, but I can't find step to build it. Anyone tell me? llvm-gcc now has complete support for the ARM v7 NEON instruction set. This support differs slightly from the GCC implementation. Please see the ARM Advanced SIMD (NEON) Intrinsics and Types in LLVM...

...im=c(4,4)); a4=c(4,4,4,4,4,0,3,3,3,3,0,4,4,4,0,0,0,0,0,0); a4=array(a4,dim=c(5,4)); a5=c(4,4,4,4,4,0,4,4,4,4,0,3,3,3,0,0,1,1,0,0); a5=array(a5,dim=c(5,4)); a6=c(4,4,4,4,4,0,1,1,1,1,0,4,4,4,0,0,3,3,0,0); a6=array(a6,dim=c(5,4)); a7=c(1,1,1,1,1,0,4,4,4,4,0,3,3,3,0,0,4,4,0,0); a7=array(a7,dim=c(5,4)); a8=c(4,4,4,4,4,0,3,3,3,3,0,1,1,1,0,0,4,4,0,0); a8=array(a8,dim=c(5,4)); l=list(a1,a2,a3,a4,a5,a6,a7,a8); x <- sapply(1:length(l), function(x) { sum(sapply(l, function(y) { if ( nrow(l[[x]]) != nrow(y) | ncol(l[[x]]) != ncol(y) ) FALSE else sum(y != l[[x]]) == 0 })) } ); l; x Using th...

Hello > My host is Linux on x86, and I want llvm-gcc generate code for Arm > Cortex-A8. > I saw that in LLVM 2.7 Release Notes, but I can't find step to build > it. Anyone tell me? Build llvm-gcc exactly the same way you're building the cross gcc for your target. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg Stat...