Displaying 2 results from an estimated 2 matches for "a78cb8cf".
2012 Jun 13
0
[LLVMdev] non-SSA IR generation
Hi Amruth,
If you do not specify any optimization flag for 'clang' and do not run 'opt
-mem2reg' pass on the generated IR file, it is in non-SSA form. However,
many variables stay in memory instead of registers in this case.
Thanks,
Jiesheng
On Wed, Jun 13, 2012 at 1:17 PM, <amruth.rd at knights.ucf.edu> wrote:
> I am experimenting with LLVM optimizer and found that
2012 Jun 13
3
[LLVMdev] non-SSA IR generation
I am experimenting with LLVM optimizer and found that the bit code file clang emits is already in SSA form, but I want to generate it in non-SSA form. Would you let me know if there is any way of doing it?
Cheera,Amruth
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