Displaying 8 results from an estimated 8 matches for "a3dc2ba19fb2".
2020 Apr 16
1
[PATCH] drm/nouveau: Fix regression by audio component transition
...able at vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai at suse.de>
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 16 ++++++++++------
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index a3dc2ba19fb2..3a9fd565079d 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -481,15 +481,16 @@ nv50_dac_create(struct drm_connector *connector, struct dcb_output *dcbe)
* audio component binding for ELD notification
*/
static void
-nv50_audio_component_e...
2020 Feb 14
0
[PATCH v2 1/5] drm/nouveau/kms/nv50-: Initialize core channel in nouveau_display_create()
...tialize the core
channel during resume.
Signed-off-by: Lyude Paul <lyude at redhat.com>
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index a3dc2ba19fb2..ba07b0154d2b 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -2394,7 +2394,8 @@ nv50_display_init(struct drm_device *dev, bool resume, bool runtime)
struct drm_encoder *encoder;
struct drm_plane *plane;
- core->func->init(core);
+ i...
2020 Feb 12
0
[PATCH 1/4] drm/nouveau/kms/nv50-: Probe SOR caps for DP interlacing support
...| 21 ++++++++++++++-------
drivers/gpu/drm/nouveau/nouveau_connector.c | 10 +++++++++-
drivers/gpu/drm/nouveau/nouveau_encoder.h | 3 +++
3 files changed, 26 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index a3dc2ba19fb2..32a1c4221f1e 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -1714,6 +1714,9 @@ nv50_sor_create(struct drm_connector *connector, struct dcb_output *dcbe)
struct nv50_disp *disp = nv50_disp(encoder->dev);
struct nvkm_i2c_aux *aux =...
2020 Feb 05
3
[PATCH v3 0/3] drm/nouveau: Support NVIDIA format modifiers
This series modifies the NV5x+ nouveau display backends to advertise
appropriate format modifiers on their display planes in atomic mode
setting blobs.
Corresponding modifications to Mesa/userspace are available on the
Mesa-dev mailing list as the series:
nouveau: Improved format modifier support
I've tested this on Tesla, Kepler, Pascal, and Turing-class hardware
using various formats
2020 Feb 10
3
[PATCH v5 0/3] drm/nouveau: Support NVIDIA format modifiers
This series modifies the NV5x+ nouveau display backends to advertise
appropriate format modifiers on their display planes in atomic mode
setting blobs.
Corresponding modifications to Mesa/userspace are available on the
Mesa-dev gitlab merge request 3724:
https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3724
I've tested this on Tesla, Kepler, Pascal, and Turing-class hardware
using
2020 Feb 07
3
[PATCH v4 0/3] drm/nouveau: Support NVIDIA format modifiers
This series modifies the NV5x+ nouveau display backends to advertise
appropriate format modifiers on their display planes in atomic mode
setting blobs.
Corresponding modifications to Mesa/userspace are available on the
Mesa-dev gitlab merge request 3724:
https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3724
I've tested this on Tesla, Kepler, Pascal, and Turing-class hardware
using
2020 Feb 14
5
[PATCH v2 0/5] drm/nouveau: DP interlace fixes
Currently, nouveau doesn't actually bother to try probing whether or not
it can actually handle interlaced modes over DisplayPort. As a result,
on volta and later we'll end up trying to set an interlaced mode even
when it's not supported and cause the front end for the display engine
to hang.
So, let's teach nouveau to reject interlaced modes on hardware that
can't actually
2020 Feb 12
8
[PATCH 0/4] drm/nouveau: DP interlace fixes
Currently, nouveau doesn't actually bother to try probing whether or not
it can actually handle interlaced modes over DisplayPort. As a result,
on volta and later we'll end up trying to set an interlaced mode even
when it's not supported and cause the front end for the display engine
to hang.
So, let's teach nouveau to reject interlaced modes on hardware that
can't actually