Displaying 3 results from an estimated 3 matches for "_z3fooiiiiiiiii".
2017 Nov 17
2
[GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try!
...ck1 is stored in bytes [0,4) above SP, but for big-endian targets this should be in bytes [4,8):
>
> // /work/llvm/build/bin/clang --target=aarch64-arm-none-eabi -march=armv8-a -c callees.cpp -O0 -Wall -std=c++11 -mllvm -global-isel=true -mllvm -global-isel-abort=0 -mbig-endian -o - -S
> _Z3fooiiiiiiiii: // @_Z3fooiiiiiiiii
> // BB#0: // %entry
> sub sp, sp, #48 // =48
> ldr w8, [sp, #48] // <= Should be [sp, #52]
> str w0, [sp, #44]
> str w1, [sp, #40]
>...
2017 Nov 27
2
[GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try!
...ck1 is stored in bytes [0,4) above SP, but for big-endian targets this should be in bytes [4,8):
>
> // /work/llvm/build/bin/clang --target=aarch64-arm-none-eabi -march=armv8-a -c callees.cpp -O0 -Wall -std=c++11 -mllvm -global-isel=true -mllvm -global-isel-abort=0 -mbig-endian -o - -S
> _Z3fooiiiiiiiii: // @_Z3fooiiiiiiiii
> // BB#0: // %entry
> sub sp, sp, #48 // =48
> ldr w8, [sp, #48] // <= Should be [sp, #52]
> str w0, [sp, #44]
> str w1, [sp, #40]
>...
2017 Nov 14
6
[GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try!
To give an update here, we actually are not missing a mapping. The code complains because we are copying around a fp16 into a gpr32 and that shouldn’t be done with a copy (default mapping).
I extended the repairing code to issue G_ANYEXT in those cases instead of asserting.
However, now, I have to teach instruction select about those ANYEXT otherwise we’ll fallback in that case. But that’s a