search for: _z3fooii

...(i = 0 ; i < n; i += incr ) { if (i < n/2) globalvar += incr; } return; } GCC output: $ aarch64-linux-gnu-g++ -S -o - -O3 -ffast-math -march=armv8-a+simd test.cpp .arch armv8-a+fp+simd .file "test.cpp" .text .align 2 .global _Z3fooii .type _Z3fooii, %function _Z3fooii: .LFB0: .cfi_startproc cbz w0, .L1 adrp x6, globalvar add w5, w0, w0, lsr 31 ldr w3, [x6,#:lo12:globalvar] <== hoist load of globalvar mov w2, 0 asr w5, w5, 1 .L4:...

...>> } >> >> GCC output: >> >> $ aarch64-linux-gnu-g++ -S -o - -O3 -ffast-math -march=armv8-a+simd test.cpp >> .arch armv8-a+fp+simd >> .file "test.cpp" >> .text >> .align 2 >> .global _Z3fooii >> .type _Z3fooii, %function >> _Z3fooii: >> .LFB0: >> .cfi_startproc >> cbz w0, .L1 >> adrp x6, globalvar >> add w5, w0, w0, lsr 31 >> ldr w3, [x6,#:lo12:globalvar]...

...(i = 0 ; i < n; i += incr ) {     if (i < n/2)       globalvar += incr;   } return; } GCC output: $ aarch64-linux-gnu-g++ -S -o -  -O3  -ffast-math -march=armv8-a+simd test.cpp         .arch armv8-a+fp+simd         .file   "test.cpp"         .text         .align  2         .global _Z3fooii         .type   _Z3fooii, %function _Z3fooii: .LFB0:         .cfi_startproc         cbz     w0, .L1         adrp    x6, globalvar         add     w5, w0, w0, lsr 31         ldr     w3, [x6,#:lo12:globalvar]                        <== hoist load of globalvar         mov     w2, 0         asr     ...

...llowing excerpts from my RegisterInfo.td. def V4R0 : R4v<0 , "V4R0 ", []>, DwarfRegNum<0>; def R0 : Rg<0 , "R0", [V4R0]>, DwarfRegNum<0>; def R1 : Rg<1 , "R1", [V4R0]>, DwarfRegNum<1>; when trying to compile: define void @_Z3fooii(i32 %a, i32 %b) { entry: %retval = select i1 false, i32 %a, i32 %b ; <i32> [#uses=0] ret void } I get this error: entry (0x8503b90, LLVM BB @0x8501b00, ID#0): %reg1024 = ORI %R0, 0 %reg1025 = ORI %R1, 0 RETL Machine Function *****...

...lt;0 , "V4R0 ", []>, DwarfRegNum<0>; > > def R0 : Rg<0 , "R0", [V4R0]>, DwarfRegNum<0>; > def R1 : Rg<1 , "R1", [V4R0]>, DwarfRegNum<1>; How are R4v and Rg defined? > > when trying to compile: > > define void @_Z3fooii(i32 %a, i32 %b) { > entry: > %retval = select i1 false, i32 %a, i32 %b ; > <i32> [#uses=0] > ret void > } > > I get this error: > > entry (0x8503b90, LLVM BB @0x8501b00, ID#0): > %reg1024 = ORI %R0, 0 > %reg1025...

...er> aliases> : MyReg<n> { let Num = num; let Aliases = aliases; } class R4v<bits<6> num, string n, list<Register> aliases> : MyReg<n> { let Num = num; let Aliases = aliases; } >> >> when trying to compile: >> >> define void @_Z3fooii(i32 %a, i32 %b) { >> entry: >> %retval = select i1 false, i32 %a, i32 %b ; >> <i32> [#uses=0] >> ret void >> } >> >> I get this error: >> >> entry (0x8503b90, LLVM BB @0x8501b00, ID#0): >> %reg...

I'm writing a pass that eliminates some variables. To show the effect of the pass i need to show that I deleted the variables that originally appear in the user code, not temporary variables added by llvm. On Mon, Feb 8, 2016 at 5:59 PM, Mehdi Amini <mehdi.amini at apple.com> wrote: > > > On Feb 8, 2016, at 6:39 AM, Mohammad Norouzi via llvm-dev < > llvm-dev at

...R3, R4, R5, R6, R7, R8, R9, R10)>; // this is also general purpose register class def GRRegsAdditional : RegisterClass<"FOO", [i32], 32, (add R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, SP)>; If I have a piece of bitcode looks like this: define i32 @_Z3fooii(i32 %a, i32 %b) #0 { %1 = add nsw i32 %a, %b ret i32 %1 } I want the assembly looks like this: move v0, p0 move v1, p1 add-int v10, v0, v1 return v10 So far, I have tried is to implement the LowerFormalArguments() like this: SDValue FOOTargetLowering::LowerFor...

These are exactly the sorts of code transformations we want to allow by delaying the outlining until later. By keeping such code inlined in the parent function until after optimization, we enable a lot of core optimizations like SROA. For example, we should be able to completely eliminate wrappers like unique_ptr that would otherwise stay around due to the pointer escaped to the destructor call

...gh. If an instruction is in the landing pad block but not inside a begincatch/endcatch pair it will be interpreted as cleanup code. I think that is OK, but it’s something we’ll need to be aware of. For reference, Joseph’s first scenario will look like this: ; Function Attrs: uwtable define i32 @_Z3fooii(i32 %a, i32 %b) #0 { entry: <…snip…> store i32 %a, i32* %a.addr, align 4 store i32 %b, i32* %b.addr, align 4 invoke void @_Z11maybe_throwv() to label %invoke.cont unwind label %lpad lpad: ; preds = %entry %4 = landingpad { i8*,...