Displaying 2 results from an estimated 2 matches for "_z3fn1v".
Did you mean:
_z2f1v
2016 Dec 02
2
Is the instruction %4 = select i1 %tobool.i, metadata !12, metadata !10 legal?
...ndex_node*, i32 }
%struct.ordered_index_node = type { %struct.B, %struct.F }
%struct.B = type { i32 }
%struct.F = type { i32*, i32* }
$_ZN1G13final_insert_Ev = comdat any
$_ZN1G7insert_Ev = comdat any
$_ZN1F4leftEv = comdat any
$_ZN1F5rightEv = comdat any
; Function Attrs: uwtable
define void @_Z3fn1v() local_unnamed_addr #0 {
entry:
%t = alloca %struct.G, align 8
%0 = bitcast %struct.G* %t to i8*
call void @llvm.lifetime.start(i64 16, i8* %0) #5
call void @_ZN1G13final_insert_Ev(%struct.G* nonnull %t)
call void @llvm.lifetime.end(i64 16, i8* %0) #5
ret void
}
; Function Attrs: argm...
2016 Dec 02
4
Is the instruction %4 = select i1 %tobool.i, metadata !12, metadata !10 legal?
Hi,
The phase of instruction combine cannot handle the instruction %4 = select i1 %tobool.i, metadata !12, metadata !10 generated by the phase of CFG simplification and the compiler generates an assertion failure.
I wonder whether this is valid LLVM IR:
%4 = select i1 %tobool.i, metadata !12, metadata !10
Before CFGSimplify
cond.true.i: ; preds = %entry