Displaying 3 results from an estimated 3 matches for "_usleep".
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usleep
2011 Nov 12
0
[LLVMdev] Thumb-2 code generation error in Apple LLVM at all optimization levels
...ment.
The IT instruction is how you express predication in Thumb2. Unlike ARM instructions, where the predicate is part of the instruction, Thumb2 instructions use IT to set the predicates for following instructions. In this case, it applies the "hs" predicate to the subsequent call to _usleep. I'd have to double check, but I'm fairly confident that the hs condition code is equivalent to >= for integers.
--Owen
2011 Nov 12
2
[LLVMdev] Thumb-2 code generation error in Apple LLVM at all optimization levels
...od's code.
.loc 1 388 3
ldr r0, [r5]
ldr r1, [r4, r0]
adds r1, #1
str r1, [r4, r0]
.loc 1 390 64
mov r0, r4
ldr r1, [r6]
blx _objc_msgSend
vmov s0, r0
vmul.f32 d0, d0, d8
vcvt.u32.f32 d0, d0
vmov r0, s0
Ltmp272:
.loc 1 392 9
cmp.w r0, #4000
Ltmp273:
.loc 1 393 13
it hs
blxhs _usleep
cmp.w *looks* like a 16-bit comparison with an immediate constant, but
in reality the constant is twelve bits. The ARM and Thumb instruction
sets have quite severe restrictions on the allowed ranges of immediate
values because the richness of the ARM and Thumb instruction set makes
it hard to fin...
2011 Nov 12
2
[LLVMdev] Thumb-2 code generation error in Apple LLVM at all optimization levels
...;
> The IT instruction is how you express predication in Thumb2. Unlike ARM instructions, where the predicate is part of the instruction, Thumb2 instructions use IT to set the predicates for following instructions. In this case, it applies the "hs" predicate to the subsequent call to _usleep. I'd have to double check, but I'm fairly confident that the hs condition code is equivalent to >= for integers.
All of my regression testing so far has had my speed slider set to its
maximum, so the useconds_t has always been precisely zero.
Maybe there's something special about...