Displaying 11 results from an estimated 11 matches for "_tile_data".
2020 Aug 14
6
Intel AMX programming model discussion.
...ropose for the AMX programming model.
1. Data type.
We'd like to have fixed vector type for AMX. Since the shape to AMX register can be configurable, the vector size is the maximum size of AMX register. That means the vector size is 1024 bytes.
The C code may look like this.
typedef int _tile_data __attribute__((__vector_size__(1024), __aligned__(64)));
_tile_data tile;
And the LLVM IR may look like this.
@tile = dso_local local_unnamed_addr global <256 x i32> zeroinitializer, align 64
For llvm IR, it is nice to have a new type x86_amxtile that can be mapped to AMX registers.
2....
2020 Aug 14
3
Intel AMX programming model discussion.
...ropose for the AMX programming model.
1. Data type.
We'd like to have fixed vector type for AMX. Since the shape to AMX register can be configurable, the vector size is the maximum size of AMX register. That means the vector size is 1024 bytes.
The C code may look like this.
typedef int _tile_data __attribute__((__vector_size__(1024), __aligned__(64)));
_tile_data tile;
And the LLVM IR may look like this.
@tile = dso_local local_unnamed_addr global <256 x i32> zeroinitializer, align 64
For llvm IR, it is nice to have a new type x86_amxtile that can be mapped to AMX registers.
2....
2020 Aug 18
2
Intel AMX programming model discussion.
...ropose for the AMX programming model.
1. Data type.
We'd like to have fixed vector type for AMX. Since the shape to AMX register can be configurable, the vector size is the maximum size of AMX register. That means the vector size is 1024 bytes.
The C code may look like this.
typedef int _tile_data __attribute__((__vector_size__(1024), __aligned__(64)));
_tile_data tile;
And the LLVM IR may look like this.
@tile = dso_local local_unnamed_addr global <256 x i32> zeroinitializer, align 64
For llvm IR, it is nice to have a new type x86_amxtile that can be mapped to AMX registers.
2....
2020 Aug 19
2
Intel AMX programming model discussion.
...ropose for the AMX programming model.
1. Data type.
We'd like to have fixed vector type for AMX. Since the shape to AMX register can be configurable, the vector size is the maximum size of AMX register. That means the vector size is 1024 bytes.
The C code may look like this.
typedef int _tile_data __attribute__((__vector_size__(1024), __aligned__(64)));
_tile_data tile;
And the LLVM IR may look like this.
@tile = dso_local local_unnamed_addr global <256 x i32> zeroinitializer, align 64
For llvm IR, it is nice to have a new type x86_amxtile that can be mapped to AMX registers.
2....
2020 Aug 19
3
Intel AMX programming model discussion.
...ropose for the AMX programming model.
1. Data type.
We'd like to have fixed vector type for AMX. Since the shape to AMX register can be configurable, the vector size is the maximum size of AMX register. That means the vector size is 1024 bytes.
The C code may look like this.
typedef int _tile_data __attribute__((__vector_size__(1024), __aligned__(64)));
_tile_data tile;
And the LLVM IR may look like this.
@tile = dso_local local_unnamed_addr global <256 x i32> zeroinitializer, align 64
For llvm IR, it is nice to have a new type x86_amxtile that can be mapped to AMX registers.
2....
2020 Aug 15
2
Intel AMX programming model discussion.
...ropose for the AMX programming model.
1. Data type.
We'd like to have fixed vector type for AMX. Since the shape to AMX register can be configurable, the vector size is the maximum size of AMX register. That means the vector size is 1024 bytes.
The C code may look like this.
typedef int _tile_data __attribute__((__vector_size__(1024), __aligned__(64)));
_tile_data tile;
And the LLVM IR may look like this.
@tile = dso_local local_unnamed_addr global <256 x i32> zeroinitializer, align 64
For llvm IR, it is nice to have a new type x86_amxtile that can be mapped to AMX registers.
2....
2020 Aug 19
2
Intel AMX programming model discussion.
...ropose for the AMX programming model.
1. Data type.
We'd like to have fixed vector type for AMX. Since the shape to AMX register can be configurable, the vector size is the maximum size of AMX register. That means the vector size is 1024 bytes.
The C code may look like this.
typedef int _tile_data __attribute__((__vector_size__(1024), __aligned__(64)));
_tile_data tile;
And the LLVM IR may look like this.
@tile = dso_local local_unnamed_addr global <256 x i32> zeroinitializer, align 64
For llvm IR, it is nice to have a new type x86_amxtile that can be mapped to AMX registers.
2....
2020 Aug 14
2
Intel AMX programming model discussion.
...ropose for the AMX programming model.
1. Data type.
We'd like to have fixed vector type for AMX. Since the shape to AMX register can be configurable, the vector size is the maximum size of AMX register. That means the vector size is 1024 bytes.
The C code may look like this.
typedef int _tile_data __attribute__((__vector_size__(1024), __aligned__(64)));
_tile_data tile;
And the LLVM IR may look like this.
@tile = dso_local local_unnamed_addr global <256 x i32> zeroinitializer, align 64
For llvm IR, it is nice to have a new type x86_amxtile that can be mapped to AMX registers.
2....
2020 Aug 19
3
Intel AMX programming model discussion.
...ropose for the AMX programming model.
1. Data type.
We'd like to have fixed vector type for AMX. Since the shape to AMX register can be configurable, the vector size is the maximum size of AMX register. That means the vector size is 1024 bytes.
The C code may look like this.
typedef int _tile_data __attribute__((__vector_size__(1024), __aligned__(64)));
_tile_data tile;
And the LLVM IR may look like this.
@tile = dso_local local_unnamed_addr global <256 x i32> zeroinitializer, align 64
For llvm IR, it is nice to have a new type x86_amxtile that can be mapped to AMX registers.
2....
2020 Aug 20
1
Intel AMX programming model discussion.
...be configurable, the vector size is the
> maximum size of AMX register. That means
> the vector size is 1024 bytes.
>
> The C code may look like this.
>
> typedef int _tile_data
> __attribute__((__vector_size__(1024),
> __aligned__(64)));
>
> _tile_data tile;
>
> And the LLVM IR may look like this.
>
> @tile = d...
2020 Aug 21
2
Intel AMX programming model discussion.
...ropose for the AMX programming model.
1. Data type.
We'd like to have fixed vector type for AMX. Since the shape to AMX register can be configurable, the vector size is the maximum size of AMX register. That means the vector size is 1024 bytes.
The C code may look like this.
typedef int _tile_data __attribute__((__vector_size__(1024), __aligned__(64)));
_tile_data tile;
And the LLVM IR may look like this.
@tile = dso_local local_unnamed_addr global <256 x i32> zeroinitializer, align 64
For llvm IR, it is nice to have a new type x86_amxtile that can be mapped to AMX registers.
2....