search for: _sparse_

...general purpose register. Luckily, SSE has the MOVMSKPS instruction, which converts sparse masks to packed masks. I am not sure which representation is better, but both are reasonable. The former may cause register pressure in some cases, while the latter may add the packing-unpacking overhead. _Sparse_ After my discussion with Duncan, last week, I started working on the promotion of type <4 x i1> to <4 x i32>, and I ran into a problem.  It looks like the codegen term ‘promote’ is overloaded.  For scalars, the ‘promote’ operation converts scalars to larger bit-width scalars.  For vect...

...> I can think of two ways to represent masks in x86: sparse and > packed. In the sparse method, the masks are kept in <4 x 32bit> > registers, which are mapped to xmm registers. This is the ‘native’ way > of using masks. This argues for the sparse representation, I think. > _Sparse_ After my discussion with Duncan, last week, I started working > on the promotion of type <4 x i1> to <4 x i32>, and I ran into a > problem.  It looks like the codegen term ‘promote’ is overloaded. Heavily. :-/ >  For scalars, the ‘promote’ operation converts scalars to large...

...> I can think of two ways to represent masks in x86: sparse and > packed. In the sparse method, the masks are kept in <4 x 32bit> > registers, which are mapped to xmm registers. This is the ‘native’ way > of using masks. This argues for the sparse representation, I think. > _Sparse_ After my discussion with Duncan, last week, I started working > on the promotion of type <4 x i1> to <4 x i32>, and I ran into a > problem.  It looks like the codegen term ‘promote’ is overloaded. Heavily. :-/ >  For scalars, the ‘promote’ operation converts scalars to large...

...ys to represent masks in x86: sparse and >> packed. In the sparse method, the masks are kept in<4 x 32bit> >> registers, which are mapped to xmm registers. This is the ‘native’ way >> of using masks. > > This argues for the sparse representation, I think. > >> _Sparse_ After my discussion with Duncan, last week, I started working >> on the promotion of type<4 x i1> to<4 x i32>, and I ran into a >> problem. It looks like the codegen term ‘promote’ is overloaded. > > Heavily. :-/ > >> For scalars, the ‘promote’ operation...

...> I can think of two ways to represent masks in x86: sparse and > packed. In the sparse method, the masks are kept in <4 x 32bit> > registers, which are mapped to xmm registers. This is the ‘native’ way > of using masks. This argues for the sparse representation, I think. > _Sparse_ After my discussion with Duncan, last week, I started working > on the promotion of type <4 x i1> to <4 x i32>, and I ran into a > problem.  It looks like the codegen term ‘promote’ is overloaded. Heavily. :-/ >  For scalars, the ‘promote’ operation converts scalars to large...