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2016 Nov 04
2
[RFC] Supporting ARM's SVE in LLVM
...ges are made to related interfaces and their users. ### IRBuilder Interface: ```cpp Value *CreateShuffleVector(Value *V1, Value *V2, Value *Mask, const Twine &Name = ""); ``` ### Fixed-Width Behaviour: No change. ### SelectionDAG: See [*ISD::VECTOR\_SHUFFLE\_VAR*](#isdvectorshufflevar). # Constants Scalable vectors of known constants cannot be represented within LLVM due to their unknown element count. Optimizations performed on scalable vectors become much more reliant on `ConstantExpr`s. Most of the instructions talked about in this document also...