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2005 Apr 20
2
Speex-1.1.7 seems to crash with --enable-sse (on P3/GCC-3.2)..
...gt; [root@tomb root]# speexenc -n loup.wav loup.spx<br> Encoding 8000 Hz audio using narrowband mode (stereo)<br> Segmentation fault (core dumped)<br> <br> Stack&nbsp; trace:<br> Loaded symbols for /lib/ld-linux.so.2<br> #0&nbsp; fir_mem2_10 (x=0x80552a8, _num=0x80566b4, y=0x80558ac, N=160, ord=10, _mem=0x80568cc) at xmmintrin.h:790<br> 790&nbsp;&nbsp;&nbsp;&nbsp; {<br> (gdb) bt<br> #0&nbsp; fir_mem2_10 (x=0x80552a8, _num=0x80566b4, y=0x80558ac, N=160, ord=10, _mem=0x80568cc) at xmmintrin.h:790<br> #1&nbsp;...
2005 Apr 20
0
Speex-1.1.7 seems to crash with --enable-sse (on P3/GCC-3.2)..
...gt; Both version 1.1.6 and 1.1.7 crash: > > [root@tomb root]# speexenc -n loup.wav loup.spx > Encoding 8000 Hz audio using narrowband mode (stereo) > Segmentation fault (core dumped) > > Stack trace: > Loaded symbols for /lib/ld-linux.so.2 > #0 fir_mem2_10 (x=0x80552a8, _num=0x80566b4, y=0x80558ac, N=160, > ord=10, _mem=0x80568cc) at xmmintrin.h:790 > 790 { > (gdb) bt > #0 fir_mem2_10 (x=0x80552a8, _num=0x80566b4, y=0x80558ac, N=160, > ord=10, _mem=0x80568cc) at xmmintrin.h:790 > #1 0xb75dc509 in fir_mem2 (x=0x80552a8, _num=0x80566b4, y=0x80558a...
2005 Mar 08
1
Speex-1.1.7 seems to crash with --enable-sse (on P3/GCC-3.2)..
...nux"... (gdb) r --rate 8000 --16bit -n /dev/zero /tmp/foo Starting program: /usr/src/speex-1.1.7/src/.libs/lt-speexenc --rate 8000 --16bit -n /dev/zero /tmp/foo Encoding 8000 Hz audio using narrowband mode (mono) Program received signal SIGSEGV, Segmentation fault. fir_mem2_10 (x=0x8054a88, _num=0x8055e94, y=0x805508c, N=160, ord=10, _mem=0x80560ac) at /usr/lib/gcc-lib/i386-redhat-linux/3.2/include/xmmintrin.h:774 774 { (gdb) (gdb) bt #0 fir_mem2_10 (x=0x8054a88, _num=0x8055e94, y=0x805508c, N=160, ord=10, _mem=0x80560ac) at /usr/lib/gcc-lib/i386-redhat-linux/3.2/include/xmm...
2004 Aug 06
2
Coredumps when --enable-sse is selected
...ome there), on a Williamette core Pentium 4 (1.6Ghz) system. I've tried both speex 1.1.5 release, and the current CVS (which self-IDs as 1.1.4), and the result is the same. I suspect some funk in the use of the SSE intrinsics macros. Backtrace: #0 0x40024594 in filter_mem2_10 (x=0x805f31c, _num=0x8061fb8, _den=0x8061fe4, y=0x806071c, N=160, ord=10, _mem=0x8062150) at xmmintrin.h:790 #1 0x400248b4 in filter_mem2 (x=0x805f31c, _num=0x8061fb8, _den=0x8061fe4, y=0x806071c, N=1, ord=0, _mem=0x8061fe4) at filters_sse.h:135 #2 0x40019d1e in nb_encode (state=0x805ebd0, vin=0x80582b4,...
2004 Aug 06
3
[PATCH] Make SSE Run Time option.
...pure asm approach, so it's not too bad (SSE asm is 2x faster than x87). Note that unlike the previous version which had a kludge to work with order 8 (required for wideband), this version only works with order 10, so it will only work for narrowband. <p>void filter_mem2(float *x, float *_num, float *_den, float *y, int N, int ord, float *_mem) { __m128 num[3], den[3], mem[3]; int i; /* Copy numerator, denominator and memory to aligned xmm */ for (i=0;i<2;i++) { mem[i] = _mm_loadu_ps(_mem+4*i); num[i] = _mm_loadu_ps(_num+4*i+1); den[i] = _mm_loadu_ps...
2004 Aug 06
5
[PATCH] Make SSE Run Time option.
> Personally, I don't think much of PNI. The complex arithmetic stuff they > added sets you up for a lot of permute overhead that is inefficient -- > especially on a processor that is already weak on permute. In my opinion, Actually, the new instructions make it possible to do complex multiplies without the need to permute and separate the add and subtract. The really useful
2004 Aug 06
0
Coredumps when --enable-sse is selected
...1.6Ghz) system. > > I've tried both speex 1.1.5 release, and the current CVS (which self-IDs as > 1.1.4), and the result is the same. > > I suspect some funk in the use of the SSE intrinsics macros. > > Backtrace: > > #0 0x40024594 in filter_mem2_10 (x=0x805f31c, _num=0x8061fb8, > _den=0x8061fe4, y=0x806071c, N=160, ord=10, > _mem=0x8062150) at xmmintrin.h:790 > #1 0x400248b4 in filter_mem2 (x=0x805f31c, _num=0x8061fb8, _den=0x8061fe4, > y=0x806071c, N=1, ord=0, > _mem=0x8061fe4) at filters_sse.h:135 > #2 0x40019d1e in nb_encode (st...
2004 Aug 06
2
[PATCH] Make SSE Run Time option. Add Win32 SSE code
...sse; void bw_lpc(float gamma, float *lpc_in, float *lpc_out, int order) { @@ -46,41 +48,548 @@ } } -#ifdef _USE_SSE -#include "filters_sse.h" -#else -void filter_mem2(float *x, float *num, float *den, float *y, int N, int ord, float *mem) + +void filter_mem2(float *x, float *_num, float *_den, float *y, int N, int ord, float *_mem) { - int i,j; - float xi,yi; - for (i=0;i<N;i++) - { - xi=x[i]; - y[i] = num[0]*xi + mem[0]; - yi=y[i]; - for (j=0;j<ord-1;j++) - { - mem[j] = mem[j+1] + num[j+1]*xi - den[j+1]*yi; - } -...
2017 Jan 02
1
[PATCH] Use ASN1_STRING_get0_data for openssl-1.1.0
...6 +345,7 @@ int SSL_CTX_set_default_verify_paths_win32(SSL_CTX *_ssl_ctx); # include <poll.h> # include <unistd.h> # include <openssl/ssl.h> +# include <openssl/asn1.h> typedef int op_sock; @@ -1531,6 +1533,7 @@ static long op_bio_retry_ctrl(BIO *_b,int _cmd,long _num,void *_ptr){ # if OPENSSL_VERSION_NUMBER<0x10100000L # define BIO_set_data(_b,_ptr) ((_b)->ptr=(_ptr)) # define BIO_set_init(_b,_init) ((_b)->init=(_init)) +# define ASN1_STRING_get0_data ASN1_STRING_data # endif static int op_bio_retry_new(BIO *_b){ @@ -1632,7 +1635,7 @@ static...
2004 Aug 06
2
[PATCH] Make SSE Run Time option. Add Win32 SSE code
...doing in stack-alloc.h. One other thing we noticed is that you tend to do a lot of for loop based copies: from your new filters_sse.h around the asm code for (i=0;i<12;i++) num[i]=den[i]=0; for (i=0;i<12;i++) mem[i]=0; for (i=0;i<ord;i++) { num[i]=_num[i+1]; den[i]=_den[i+1]; } for (i=0;i<ord;i++) mem[i]=_mem[i]; <<< asm code>>> for (i=0;i<ord;i++) _mem[i]=mem[i]; <p>could easily be reduced to memset(num,0,12); memset(den,0,12); memset(mem,0,12); memcpy(num,_num+1,ord); memcpy(den...
2004 Aug 06
2
[PATCH] Make SSE Run Time option. Add Win32 SSE code
Jean-Marc, There is a big difference between SSE and SSEFP. The SSEFP means that the CPU supports the xmm registers. All Intel chips with SSE support do, however no current 32 bit AMD chips support the XMM registers. They will support the SSE instructions but not those registers. You are right about the SSE2 not being used. The AMD Opterons are the first AMD CPU's which support
2011 Nov 18
3
Permutations
Hi all, why factorial(150) shows the error out of range in 'gammafn'? I have to calculate the number of subset formed by 150 samples taking 10 at a time. How is this possible? best [[alternative HTML version deleted]]