Displaying 3 results from an estimated 3 matches for "_gpe".
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_gp
2011 Dec 02
6
[PATCH] tools/firmware: remove "_PS0/3" Method
...;_ADR, 0x%08x", ((slot & ~7) << 13) | (slot & 7));
/* _SUN == dev */
stmt("Name", "_SUN, 0x%08x", slot >> 3);
- push_block("Method", "_PS0, 0");
- stmt("Store", "0x%02x, \\_GPE.DPT1", slot);
- stmt("Store", "0x80, \\_GPE.DPT2");
- pop_block();
- push_block("Method", "_PS3, 0");
- stmt("Store", "0x%02x, \\_GPE.DPT1", slot);
- stmt("Store", "...
2007 Aug 29
39
[PATCH] 1/2: cpufreq/PowerNow! in Xen: Time and platform changes
Enable cpufreq support in Xen for AMD Operton processors by:
1) Allowing the PowerNow! driver in dom0 to write to the PowerNow!
MSRs.
2) Adding the cpufreq notifier chain to time-xen.c in dom0.
On a frequency change, a platform hypercall is performed to
scale the frequency multiplier in the hypervisor.
3) Adding a platform hypercall to the hypervisor the scale
the frequency multiplier and reset
2012 Jun 24
0
nouveau _BIOS method
...ST.p.GS
2580: 53 52 a0 28 92 94 54 49 53 54 0a 03 70 54 49 53 SR.(..TIST..pTIS
2590: 54 60 70 60 54 5a 4f 4e 70 44 49 41 47 61 a0 06 T`p`TZONpDIAGa..
25a0: 61 5b 22 0a 64 a1 05 53 50 50 43 a1 0b 70 00 54 a[".d..SPPC..p.T
25b0: 5a 4f 4e 53 50 50 43 08 5f 47 50 45 0a 17 14 35 ZONSPPC._GPE...5
25c0: 5f 51 35 31 00 50 38 58 48 00 0a 51 86 41 44 50 _Q51.P8XH..Q.ADP
25d0: 31 0a 80 70 01 50 57 52 53 a0 16 91 95 4f 53 59 1..p.PWRS....OSY
25e0: 53 0b d6 07 93 56 44 52 56 00 53 45 43 53 0a a7 S....VDRV.SECS..
25f0: 50 4e 4f 54 14 35 5f 51 35 32 00 50 38 58 48 00 PNOT.5_Q52.P8XH....