Displaying 5 results from an estimated 5 matches for "_flu10".
2012 Jul 25
0
[LLVMdev] Purpose of MSP430Wrapper
On 25/07/12 12:14, Paul Shortis wrote:
> Thanks Richard,
>
> You're correct, they are similar. In the XCoreInstrInfo.td patterns
> what I'm struggling with is why this ....
>
> def BL_lu10 : _FLU10<
> (outs),
> (ins calltarget:$target, variable_ops),
> "bl $target",
> [(XCoreBranchLink immU20:$target)]>;
>
> def : Pat<(XCoreBranchLink tglobaladdr:$addr), (BL_lu10
> tglobaladdr:$add...
2012 Jul 25
2
[LLVMdev] Purpose of MSP430Wrapper
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> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>
>
Thanks Richard,
You're correct, they are similar. In the XCoreInstrInfo.td patterns what
I'm struggling with is why this ....
def BL_lu10 : _FLU10<
(outs),
(ins calltarget:$target, variable_ops),
"bl $target",
[(XCoreBranchLink immU20:$target)]>;
def : Pat<(XCoreBranchLink tglobaladdr:$addr), (BL_lu10 tglobaladdr:$addr)>;
def : Pat<(XCoreBran...
2009 Nov 15
0
[LLVMdev] Matching an instruction that writes a specific register in a Pat<>
...on whose result is always written to a specific
register using set with that register as the first operand in the DAG
pattern of the instruction. For example on the XCore the result of the
the ldap instruction is written to R11 and used to match the tglobaladdr
node as follows:
def LDAP_lu10 : _FLU10<
(outs),
(ins i32imm:$addr),
"ldap r11, $addr",
[(set R11, (pcrelwrapper tglobaladdr:$addr))]>;
Is there anyway to get the same effect using a Pat<>? I'm asking because
I want to use the same instruc...
2012 Jul 25
0
[LLVMdev] Purpose of MSP430Wrapper
On 25 Jul 2012, at 04:49, Paul Shortis wrote:
> Hello,
>
> I'm considering creating an LLVM backend for a 16 bit processor and
> modelling it around the (experimental) MSP430 back end.
>
> When reviewing MSP430InstrInfo.td I see
>
> def MSP430Wrapper : SDNode<"MSP430ISD::Wrapper", SDT_MSP430Wrapper>;
>
> and can see in MSP430ISelLowering.cpp
2012 Jul 25
2
[LLVMdev] Purpose of MSP430Wrapper
Hello,
I'm considering creating an LLVM backend for a 16 bit processor and
modelling it around the (experimental) MSP430 back end.
When reviewing MSP430InstrInfo.td I see
def MSP430Wrapper : SDNode<"MSP430ISD::Wrapper", SDT_MSP430Wrapper>;
and can see in MSP430ISelLowering.cpp that
ISD::GlobalAddress:
ISD::BlockAddress:
ISD::ExternalSymbol
all get lowered to