search for: _acr

...pu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c index d02e183..5c14d6a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c @@ -801,6 +801,7 @@ acr_r352_load(struct nvkm_acr *_acr, struct nvkm_falcon *falcon, bl = acr->hsbl_unload_blob; } else { nvkm_error(_acr->subdev, "invalid secure boot blob!\n"); + kfree(bl_desc); return -EINVAL; } -- 2.7.4

...oot, subdev) diff --git a/drm/nouveau/nvkm/subdev/secboot/acr_r352.c b/drm/nouveau/nvkm/subdev/secboot/acr_r352.c index 058386720a14..b350e107eff0 100644 --- a/drm/nouveau/nvkm/subdev/secboot/acr_r352.c +++ b/drm/nouveau/nvkm/subdev/secboot/acr_r352.c @@ -746,6 +746,54 @@ acr_r352_load(struct nvkm_acr *_acr, struct nvkm_secboot *sb, return 0; } +static int +acr_r352_shutdown(struct acr_r352 *acr, struct nvkm_secboot *sb) +{ + int i; + + /* Run the unload blob to unprotect the WPR region */ + if (acr->unload_blob && sb->wpr_set) { + int ret; + + nvkm_debug(&sb->subdev,...

...cr_r352.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c >> index d02e183..5c14d6a 100644 >> --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c >> +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c >> @@ -801,6 +801,7 @@ acr_r352_load(struct nvkm_acr *_acr, struct nvkm_falcon *falcon, >> bl = acr->hsbl_unload_blob; >> } else { >> nvkm_error(_acr->subdev, "invalid secure boot blob!\n"); >> + kfree(bl_desc); >> return -EINVAL; >> } >> >> Hi Gustavo, Seeing as how I&...

...nvkm_gpuobj_memcpy_to(wpr_blob, pos, &img->wpr_header, sizeof(img->wpr_header)); @@ -447,6 +460,8 @@ acr_r352_ls_write_wpr(struct acr_r352 *acr, struct list_head *imgs, nvkm_done(wpr_blob); + kfree(gdesc); + return 0; } @@ -771,7 +786,11 @@ acr_r352_load(struct nvkm_acr *_acr, struct nvkm_falcon *falcon, struct fw_bl_desc *hsbl_desc; void *bl, *blob_data, *hsbl_code, *hsbl_data; u32 code_size; - u8 bl_desc[bl_desc_size]; + u8 *bl_desc; + + bl_desc = kzalloc(bl_desc_size, GFP_KERNEL); + if (!bl_desc) + return -ENOMEM; /* Find the bootloader descriptor fo...

...sizeof(img->wpr_header)); > @@ -447,6 +460,8 @@ acr_r352_ls_write_wpr(struct acr_r352 *acr, struct list_head *imgs, > > nvkm_done(wpr_blob); > > + kfree(gdesc); > + > return 0; > } > > @@ -771,7 +786,11 @@ acr_r352_load(struct nvkm_acr *_acr, struct nvkm_falcon *falcon, > struct fw_bl_desc *hsbl_desc; > void *bl, *blob_data, *hsbl_code, *hsbl_data; > u32 code_size; > - u8 bl_desc[bl_desc_size]; > + u8 *bl_desc; > + > + bl_desc = kzalloc(bl_desc_size, GFP_KERNEL); >...

...subdev/secboot/acr_r352.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c > index d02e183..5c14d6a 100644 > --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c > +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c > @@ -801,6 +801,7 @@ acr_r352_load(struct nvkm_acr *_acr, struct nvkm_falcon *falcon, > bl = acr->hsbl_unload_blob; > } else { > nvkm_error(_acr->subdev, "invalid secure boot blob!\n"); > + kfree(bl_desc); > return -EINVAL; > } > >

...ers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c >>> index d02e183..5c14d6a 100644 >>> --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c >>> +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c >>> @@ -801,6 +801,7 @@ acr_r352_load(struct nvkm_acr *_acr, struct nvkm_falcon *falcon, >>> bl = acr->hsbl_unload_blob; >>> } else { >>> nvkm_error(_acr->subdev, "invalid secure boot blob!\n"); >>> + kfree(bl_desc); >>> return -EINVAL;...

This revision includes initial signed PMU firmware support for GM20B (Tegra X1). This PMU code will also be used as a basis for dGPU signed PMU firmware support. With the PMU code, the refactoring of secure boot should also make more sense. ACR (secure boot) support is now separated by the driver version it originates from. This separation allows to run any version of the ACR on any chip,

Sending things in a smaller chunks since it makes their reviewing easier. This part part 2/3 of the secboot refactoring/PMU command support patch series. Part 1 was the new falcon library which should be merged soon now. This series is mainly a refactoring/sanitization of the existing secure boot code. It does not add new features (part 3 will). Secure boot handling is now separated by NVIDIA

...ut there are many potential users (GR, PMU, etc). I will test users and send further patches making use of it. Patch 4 renames a hook to something better describing its actual use. Patch 5 is where the big refactoring occurs. It looks scary, but is really just moving code (and introducing the nvkm_acr structures). Patch 6, 7 and 8 remove a few HS hooks that turn out to be unneeded, and add support for LS hooks. The end result can be observed by looking at acr_v1_gm20b.c: all the specifics of GM20B's firmware are handled in a single file, with no data structures shared with acr_v1.c. The gm...

This is a rework of the secure boot code that moves the building of the blob into its own set of source files (and own hooks), making the code more flexible and (hopefully) easier to understand as well. This rework is needed to support more signed firmware for existing and new chips. Since the firmwares in question are not available yet I cannot send the code to manage then, but hopefully the

This is a rework of the secure boot code that moves the building of the blob into its own set of source files (and own hooks), making the code more flexible and (hopefully) easier to understand as well. This rework is needed to support more signed firmware for existing and new chips. Since the firmwares in question are not available yet I cannot send the code to manage then, but hopefully the

GP10B is the chip used in Tegra X2 SoCs. This patchset adds support for its base engines after reworking secboot a bit to accomodate its calling convention better. This patchset has been tested rendering simple off-screen buffers using Mesa and yielded the expected result. Alexandre Courbot (15): secboot: allow to boot multiple falcons secboot: pass instance to LS firmware loaders secboot: