Displaying 4 results from an estimated 4 matches for "__x86_indirect_thunk_r".
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__x86_indirect_thunk_
2018 Feb 08
2
retpoline mitigation and 6.0
...riple=i686-- -no-integrated-as | FileCheck -check-prefix=X86 %s
; RUN: llc < %s -mtriple=x86_64-- -no-integrated-as | FileCheck -check-prefix=X64 %s
; If the target does not have 64-bit integer registers, emit 32-bit register
; names.
; X86: calll __x86_indirect_thunk_e{{[abcd]}}x
; X64: callq __x86_indirect_thunk_r
define void @q_modifier(i32* %p) {
entry:
tail call void asm sideeffect "call __x86_indirect_thunk_${0:V}", "r,~{dirflag},~{fpsr},~{flags}"(i32* %p)
ret void
}
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2018 Feb 07
0
retpoline mitigation and 6.0
I'll save you a review iteration. This is updated to match llvm coding
style. Capital camel case variable names and uses LLVM_FALLTHROUGH instead
of the comment.
static bool printAsmMRegister(X86AsmPrinter &P, const MachineOperand &MO,
char Mode, raw_ostream &O) {
unsigned Reg = MO.getReg();
+ bool EmitPercent = true;
+
switch (Mode) {
2018 Feb 07
2
retpoline mitigation and 6.0
On Wed, 2018-02-07 at 23:30 +0000, Chandler Carruth wrote:
> This should go to llvm-commits as a proper review. Do you want to do
> that David? Want someone on our end to pick it up?
I'll attempt to add some test cases...
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2018 Feb 08
0
retpoline mitigation and 6.0
...-check-prefix=X86 %s
> ; RUN: llc < %s -mtriple=x86_64-- -no-integrated-as | FileCheck
> -check-prefix=X64 %s
>
> ; If the target does not have 64-bit integer registers, emit 32-bit
> register
> ; names.
>
> ; X86: calll __x86_indirect_thunk_e{{[abcd]}}x
> ; X64: callq __x86_indirect_thunk_r
>
> define void @q_modifier(i32* %p) {
> entry:
> tail call void asm sideeffect "call __x86_indirect_thunk_${0:V}",
> "r,~{dirflag},~{fpsr},~{flags}"(i32* %p)
> ret void
> }
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