Displaying 15 results from an estimated 15 matches for "__write_msi_msg".
2013 May 08
11
[PATCH 1/2] xen, libxc: init msix addr/data with value from qemu via hypercall
Accelerated msix entry is initialized to zero when msixtbl_pt_register is
called. This doesn''t match the value from qemu side, although pirq may already
be mapped and binded in qemu side. Kernel will get wrong value when reading
msix info.
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@oracle.com>
Tested-by: Yuval Shaia <yuval.shaia@oracle.com>
---
tools/libxc/xc_domain.c
2014 Aug 20
1
[RFC PATCH 10/11] PCI/MSI: Split the generic MSI code into new file
...ddress_lo |
> + entry->msg.data));
> +
> + *msg = entry->msg;
> +}
> +
> +void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
> +{
> + struct msi_desc *entry = irq_get_msi_desc(irq);
> +
> + __get_cached_msi_msg(entry, msg);
> +}
> +
> +void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
> +{
> + struct msi_irqs *msi = entry->msi;
> +
> + if (!msi || !msi->ops || !msi->ops->msi_write_message)
> + return;
> + msi->ops->msi_write_message(entry, msg);
> +}
> +
> +void write_msi_msg(unsigned int...
2014 Aug 20
1
[RFC PATCH 10/11] PCI/MSI: Split the generic MSI code into new file
...ddress_lo |
> + entry->msg.data));
> +
> + *msg = entry->msg;
> +}
> +
> +void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
> +{
> + struct msi_desc *entry = irq_get_msi_desc(irq);
> +
> + __get_cached_msi_msg(entry, msg);
> +}
> +
> +void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
> +{
> + struct msi_irqs *msi = entry->msi;
> +
> + if (!msi || !msi->ops || !msi->ops->msi_write_message)
> + return;
> + msi->ops->msi_write_message(entry, msg);
> +}
> +
> +void write_msi_msg(unsigned int...
2014 Jul 26
0
[RFC PATCH 10/11] PCI/MSI: Split the generic MSI code into new file
...-zeroes. */
+ BUG_ON(!(entry->msg.address_hi | entry->msg.address_lo |
+ entry->msg.data));
+
+ *msg = entry->msg;
+}
+
+void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
+{
+ struct msi_desc *entry = irq_get_msi_desc(irq);
+
+ __get_cached_msi_msg(entry, msg);
+}
+
+void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
+{
+ struct msi_irqs *msi = entry->msi;
+
+ if (!msi || !msi->ops || !msi->ops->msi_write_message)
+ return;
+ msi->ops->msi_write_message(entry, msg);
+}
+
+void write_msi_msg(unsigned int irq, struct msi_msg *msg)
+{
+ struct msi_des...
2014 Jul 04
2
How to check for proper MSI support?
...Address: 0000000000000000 Data: 0000
> Because the address and data is invalid, so MSI can not work.
>
> Because you said pci_enable_msi() return 0 which indicates success, so I guess the device
> current power state is not D0, because checking code in __write_msi_msi.
>
> void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
> {
> if (entry->dev->current_state != PCI_D0) {
> /* Don't touch the hardware now */
> } else if (entry->msi_attrib.is_msix) {
> void __iomem *base;
> base = entry->mask_base +
>...
2014 Aug 20
1
[RFC PATCH 09/11] PCI/MSI: refactor PCI MSI driver
...PPER_ADDR);
> msg->data = readl(base + PCI_MSIX_ENTRY_DATA);
> } else {
> - struct pci_dev *dev = entry->dev;
> int pos = dev->msi_cap;
> u16 data;
>
> @@ -315,7 +337,9 @@ void get_cached_msi_msg(unsigned int irq, struct msi_msg
> *msg)
>
> void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
> {
> - if (entry->dev->current_state != PCI_D0) {
> + struct pci_dev *dev = entry->msi->data;
> +
> + if (dev->current_state != PCI_D0) {
> /* Don't touch the hardware now */
> } else if (entry->msi_attri...
2014 Aug 20
1
[RFC PATCH 09/11] PCI/MSI: refactor PCI MSI driver
...PPER_ADDR);
> msg->data = readl(base + PCI_MSIX_ENTRY_DATA);
> } else {
> - struct pci_dev *dev = entry->dev;
> int pos = dev->msi_cap;
> u16 data;
>
> @@ -315,7 +337,9 @@ void get_cached_msi_msg(unsigned int irq, struct msi_msg
> *msg)
>
> void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
> {
> - if (entry->dev->current_state != PCI_D0) {
> + struct pci_dev *dev = entry->msi->data;
> +
> + if (dev->current_state != PCI_D0) {
> /* Don't touch the hardware now */
> } else if (entry->msi_attri...
2014 Jul 26
0
[RFC PATCH 09/11] PCI/MSI: refactor PCI MSI driver
...g->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR);
msg->data = readl(base + PCI_MSIX_ENTRY_DATA);
} else {
- struct pci_dev *dev = entry->dev;
int pos = dev->msi_cap;
u16 data;
@@ -315,7 +337,9 @@ void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
{
- if (entry->dev->current_state != PCI_D0) {
+ struct pci_dev *dev = entry->msi->data;
+
+ if (dev->current_state != PCI_D0) {
/* Don't touch the hardware now */
} else if (entry->msi_attrib.is_msix) {
void __iomem *base;...
2014 Jul 04
0
How to check for proper MSI support?
...000 Data: 0000
>> Because the address and data is invalid, so MSI can not work.
>>
>> Because you said pci_enable_msi() return 0 which indicates success, so I guess the device
>> current power state is not D0, because checking code in __write_msi_msi.
>>
>> void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
>> {
>> if (entry->dev->current_state != PCI_D0) {
>> /* Don't touch the hardware now */
>> } else if (entry->msi_attrib.is_msix) {
>> void __iomem *base;
>> base = entry-&g...
2014 Jul 26
20
[RFC PATCH 00/11] Refactor MSI to support Non-PCI device
Hi all,
The series is a draft of generic MSI driver that supports PCI
and Non-PCI device which have MSI capability. If you're not interested
it, sorry for the noise.
The series is based on Linux-3.16-rc1.
MSI was introduced in PCI Spec 2.2. Currently, kernel MSI
driver codes are bonding with PCI device. Because MSI has a lot
advantages in design. More and more non-PCI devices want to
use
2014 Jul 26
20
[RFC PATCH 00/11] Refactor MSI to support Non-PCI device
Hi all,
The series is a draft of generic MSI driver that supports PCI
and Non-PCI device which have MSI capability. If you're not interested
it, sorry for the noise.
The series is based on Linux-3.16-rc1.
MSI was introduced in PCI Spec 2.2. Currently, kernel MSI
driver codes are bonding with PCI device. Because MSI has a lot
advantages in design. More and more non-PCI devices want to
use
2014 Jul 04
4
How to check for proper MSI support?
...> Because the address and data is invalid, so MSI can not work.
>>>
>>> Because you said pci_enable_msi() return 0 which indicates success, so I guess the device
>>> current power state is not D0, because checking code in __write_msi_msi.
>>>
>>> void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
>>> {
>>> if (entry->dev->current_state != PCI_D0) {
>>> /* Don't touch the hardware now */
>>> } else if (entry->msi_attrib.is_msix) {
>>> void __iomem *base;
>>>...
2014 Jul 04
2
How to check for proper MSI support?
On Thu, Jul 3, 2014 at 10:35 PM, Yijing Wang <wangyijing at huawei.com> wrote:
> Hi Brian,
> From your 01:00.0 VGA compatible controller PCI config register, it supports 1 MSI vector, so I think this
> card has no problem. But you didn't answer what's the pci_enable_msi() return during it enable MSI fail.
>
> You can check PCI bus whether support MSI like:
>
>
2014 Jul 04
0
How to check for proper MSI support?
...kable- 64bit+
Address: 0000000000000000 Data: 0000
Because the address and data is invalid, so MSI can not work.
Because you said pci_enable_msi() return 0 which indicates success, so I guess the device
current power state is not D0, because checking code in __write_msi_msi.
void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
{
if (entry->dev->current_state != PCI_D0) {
/* Don't touch the hardware now */
} else if (entry->msi_attrib.is_msix) {
void __iomem *base;
base = entry->mask_base +
entry->msi_attrib.entry_n...
2012 Jul 18
48
LSI SAS2008 Option Rom Failure
Hi-
I am trying to pass an LSI SAS2008-based HBA (IBM M1015) through to an
HVM Solaris VM, using Xen 4.2 unstable and the qemu-traditional device
model. On boot I see the following error:
MPT BIOS Fault 09h encountered at adapter PCI(00h,05h,00h)
A list search yielded
(http://comments.gmane.org/gmane.comp.emulators.xen.devel/128172),
however there was no solution for an HVM VM. I''ve