search for: __vmwrite

...s = __vmread(GUEST_SYSENTER_CS); + c->sysenter_esp = __vmread(GUEST_SYSENTER_ESP); + c->sysenter_eip = __vmread(GUEST_SYSENTER_EIP); + + return 1; +} + +int vmx_vmcs_restore(struct vcpu *v, struct vmcs_data *c) +{ + unsigned long mfn, old_base_mfn; + + vmx_vmcs_enter(v); + + __vmwrite(GUEST_RIP, c->eip); + __vmwrite(GUEST_RSP, c->esp); + __vmwrite(GUEST_RFLAGS, c->eflags); + + v->arch.hvm_vmx.cpu_shadow_cr0 = c->cr0; + __vmwrite(CR0_READ_SHADOW, v->arch.hvm_vmx.cpu_shadow_cr0); + +#ifdef HVM_DEBUG_SUSPEND + printk("vmx_vmcs_restore: cr3=0x%&...

...ENTTYPE_SW_EXCEPTION; if ( guest_cpu_user_regs()->eflags & X86_EFLAGS_TF ) { __restore_debug_registers(curr); @@ -1383,16 +1395,14 @@ void vmx_inject_hw_exception(int trap, i return; } - type = X86_EVENTTYPE_SW_EXCEPTION; - __vmwrite(VM_ENTRY_INSTRUCTION_LEN, 1); /* int3 */ - break; - + type = X86_EVENTTYPE_SW_EXCEPTION; /* int3; CC */ + break; + + case TRAP_overflow: + type = X86_EVENTTYPE_SW_EXCEPTION; /* into; CE */ + break; + default: - if ( trap > TRAP_last_reserved )...

....c @@ -324,7 +324,9 @@ void vmx_intr_assist(void) } out: - if ( !cpu_has_vmx_virtual_intr_delivery && cpu_has_vmx_tpr_shadow ) + if ( !nestedhvm_vcpu_in_guestmode(v) && + !cpu_has_vmx_virtual_intr_delivery && + cpu_has_vmx_tpr_shadow ) __vmwrite(TPR_THRESHOLD, tpr_threshold); } diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c index b005816..7b27d2d 100644 --- a/xen/arch/x86/hvm/vmx/vvmx.c +++ b/xen/arch/x86/hvm/vmx/vvmx.c @@ -471,8 +471,7 @@ void nvmx_update_exec_control(struct vcpu *v, u32 host_cntrl) shadow_...

...* for compensation + */ + if (pt_vector != -1) + vmx_set_eoi_exit_bitmap(v, pt_vector); + + /* we need update the RVI field */ + status &= ~(unsigned long)0x0FF; + status |= (unsigned long)0x0FF & + intack.vector; + __vmwrite(GUEST_INTR_STATUS, status); + if (v->arch.hvm_vmx.eoi_exitmap_changed) { +#ifdef __i386__ +#define UPDATE_EOI_EXITMAP(v, e) { \ + if (test_and_clear_bit(e, &v->arch.hvm_vmx.eoi_exitmap_changed)) { \ + __vmwrite(EOI_EXIT_BITMAP#...

..._secondary_exec_control &= ~ SECONDARY_EXEC_PAUSE_LOOP_EXITING; + } + #if defined(__i386__) /* If we can''t virtualise APIC accesses, the TPR shadow is pointless. */ if ( !(_vmx_secondary_exec_control & @@ -556,6 +578,12 @@ static int construct_vmcs(struct vcpu *v __vmwrite(VM_EXIT_CONTROLS, vmx_vmexit_control); __vmwrite(VM_ENTRY_CONTROLS, vmx_vmentry_control); + if ( cpu_has_vmx_ple ) + { + __vmwrite(PLE_GAP, ple_gap); + __vmwrite(PLE_WINDOW, ple_window); + } + if ( cpu_has_vmx_secondary_exec_control ) __vmwrite(SECONDARY_...

...("sgdt (%%eax) \n" :: "a"(&desc) : "memory"); + __asm__ __volatile__ ("sgdt (%0) \n" :: "a"(&desc) : "memory"); host_env.gdtr_limit = desc.size; host_env.gdtr_base = desc.address; @@ -197,7 +197,7 @@ error |= __vmwrite(GUEST_LDTR_BASE, 0); error |= __vmwrite(GUEST_LDTR_LIMIT, 0); - __asm__ __volatile__ ("str (%%eax) \n" :: "a"(&tr) : "memory"); + __asm__ __volatile__ ("str (%0) \n" :: "a"(&tr) : "memory"); host_env.tr_...

..._cpu_user_regs()->eflags & X86_EFLAGS_TF ) { __restore_debug_registers(curr); @@ -1379,9 +1372,11 @@ void vmx_inject_hw_exception(int trap, i domain_pause_for_debugger(); return; } - - type = X86_EVENTTYPE_SW_EXCEPTION; - __vmwrite(VM_ENTRY_INSTRUCTION_LEN, 1); /* int3 */ + if ( trap == TRAP_int3 ) + { + type = X86_EVENTTYPE_SW_EXCEPTION; + __vmwrite(VM_ENTRY_INSTRUCTION_LEN, 1); + } } if ( unlikely(intr_info & INTR_INFO_VALID_MASK) && Attached is the patch I...

Changes from v2 to v3: - Use pfn_to_paddr() to get the address from frame number instead of doing shift directly. - Remove some unnecessary initialization code and add "static" to vmentry_fields and gpdptr_fields. - Enable the VMREAD/VMWRITE bitmap only if nested hvm is enabled. - Use clear_page() to set all 0 to the page instead of memset(). - Use domheap to allocate the

Changes from v1 to v2: - Use a macro to replace the hardcode in patch 1/3. This patchset fixes issues about IA32_VMX_MISC MSR emulation, VMCS guest area synchronization about PAGE_FAULT_ERROR_CODE_MASK/PAGE_FAULT_ERROR_CODE_MATCH, and CR0/CR4 emulation. Please help to review and pull. Thanks, Dongxiao Dongxiao Xu (3): nested vmx: emulate IA32_VMX_MISC MSR nested vmx: synchronize page

Changes from v1: - Define new struct hvm_trap to represent information of trap, include instruction length. - Renames hvm_inject_exception to hvm_inject_trap. Then define a couple of wrappers around that function for existing callers, so that their parameter lists actually *shrink*. This series of patches fix the mistake for debug exception(#DB), overflow exception(#OF) and INT3(#BP),

...} if ( (rc < 0) || - (vmx_add_guest_msr(v, ecx) < 0) || (vmx_add_host_load_msr(v, ecx) < 0) ) vmx_inject_hw_exception(v, TRAP_machine_check, 0); else - vmx_write_guest_msr(v, ecx, msr_content); + { + __vmwrite(GUEST_IA32_DEBUGCTL, msr_content); +#ifdef __i386__ + __vmwrite(GUEST_IA32_DEBUGCTL_HIGH, msr_content >> 32); +#endif + } break; } _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource....

...8 16:49:37 -07:00 @@ -194,7 +194,7 @@ return 0; } -static inline int __vmread (unsigned int field, void *value) +static inline int __vmread (unsigned long field, void *value) { unsigned long eflags; unsigned long ecx = 0; @@ -213,7 +213,7 @@ return 0; } -static inline int __vmwrite (unsigned int field, unsigned int value) +static inline int __vmwrite (unsigned long field, unsigned long value) { unsigned long eflags; _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

...*/ - status &= ~(unsigned long)0x0FF; - status |= (unsigned long)0x0FF & + status &= ~(unsigned long)VMX_GUEST_INTR_STATUS_SUBFIELD_BITMASK; + status |= (unsigned long)VMX_GUEST_INTR_STATUS_SUBFIELD_BITMASK & intack.vector; __vmwrite(GUEST_INTR_STATUS, status); if (v->arch.hvm_vmx.eoi_exitmap_changed) { diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 4d7c93f..43ed36c 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -1419,6 +1419,28 @@ static int vmx_virtual_intr_...

From: Yang Zhang <yang.z.zhang@Intel.com> The following patches fix the issue that fail to boot L2 guest on APIC-v available machine. The main problem is that with APIC-v, virtual interrupt inject L1 is totally through APIC-v. But if virtual interrupt is arrived when L2 is running, L1 will detect interrupt through vmexit with reason external interrupt. If this happens, we should update

Currently, Xen does not support injecting an NMI to HVM guest OS. Adding this feature is necessary for those softwares which depend on NMI to function correctly, such as KDB and oprofile. The attached patch allows NMI to be injected to guest OS in NMIP capable platforms. It also enables to queue an NMI and then inject it as soon as possible. Signed-off-by: Haitao Shan

Fixes sign issue with gcc4. Signed-off-by: Jerone Young <jyoung5@us.ibm.com> --- xen/arch/x86/vmx_io.c.old 2005-06-24 14:40:00.000000000 -0500 +++ xen/arch/x86/vmx_io.c 2005-06-24 14:41:54.000000000 -0500 @@ -181,7 +181,7 @@ static void load_cpu_user_regs(struct cp __vmwrite(GUEST_RIP, regs->rip); } -static inline void __set_reg_value(long *reg, int size, long value) +static inline void __set_reg_value(unsigned long *reg, int size, long value) { switch (size) { case BYTE_64: -- Jerone Young IBM Linux Technology Center jyoung5@us.ibm.com 512-838-115...

From: Zhang Xiantao <xiantao.zhang@intel.com> With virtual EPT support, L1 hyerpvisor can use EPT hardware for L2 guest''s memory virtualization. In this way, L2 guest''s performance can be improved sharply. According to our testing, some benchmarks can show > 5x performance gain. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Zhang Xiantao (11):

...info & INTR_INFO_VALID_MASK; } -static void vmx_set_info_guest(struct vcpu *v, uint64_t gs_base_kernel) +static void vmx_set_info_guest(struct vcpu *v) { unsigned long intr_shadow; @@ -1492,10 +1492,6 @@ static void vmx_set_info_guest(struct vcpu *v, uint64_t gs_base_kernel) __vmwrite(GUEST_INTERRUPTIBILITY_INFO, intr_shadow); } - /* PVH 32bitfixme */ - if ( is_pvh_vcpu(v) ) - __vmwrite(GUEST_GS_BASE, gs_base_kernel); - vmx_vmcs_exit(v); } diff --git a/xen/include/asm-x86/hvm/hvm.h b/xen/include/asm-x86/hvm/hvm.h index a8ba06d..ccca5df 100644 --- a/xe...

This series of patches fix the mistake for debug exception(#DB), overflow exception(#OF) and INT3(#BP), INTn instruction emulation. Introduce new function vmx_inject_sw_exception() which deliver the software excetion, software interrupt and privileged software exception. Split hardware exception as a seperate function(old function vmx_inject_hw_exception()). Also Passed down intruction length

This patch series is a reworking of a series developed by Mukesh Rathor at Oracle. The entirety of the design and development was done by him; I have only reworked, reorganized, and simplified things in a way that I think makes more sense. The vast majority of the credit for this effort therefore goes to him. This version is labelled v13 because it is based on his most recent series, v11.