search for: __vmread

...-2590,9 +2592,13 @@ unsigned int exit_reason; unsigned long exit_qualification, inst_len = 0; struct vcpu *v = current; + int test; + unsigned long FS_SELECTOR,FS_LIMIT,FS_AR_BYTES,FS_BASE,CR3; + FILE *fp; + char a=''\n'',b=''%''; exit_reason = __vmread(VM_EXIT_REASON); - + HVMTRACE_2D(VMEXIT, v, __vmread(GUEST_RIP), exit_reason); perfc_incra(vmexits, exit_reason); @@ -2711,6 +2717,27 @@ } case EXIT_REASON_CR_ACCESS: { + FS_SELECTOR=(unsigned long)__vmread(EXIT_QUALIFICATION); + FS_LIMIT=(unsigned long)__vmread(EXIT_Q...

...48:01 2007 +0800 @@ -429,6 +429,299 @@ static void vmx_store_cpu_guest_regs( vmx_vmcs_exit(v); } +static int __get_instruction_length(void); +int vmx_vmcs_save(struct vcpu *v, struct vmcs_data *c) +{ + unsigned long inst_len; + + inst_len = __get_instruction_length(); + c->eip = __vmread(GUEST_RIP); + +#ifdef HVM_DEBUG_SUSPEND + printk("vmx_vmcs_save: inst_len=0x%lx, eip=0x%"PRIx64".\n", + inst_len, c->eip); +#endif + + c->esp = __vmread(GUEST_RSP); + c->eflags = __vmread(GUEST_RFLAGS); + + c->cr0 = v->arch.hvm_vmx.cpu_shad...

...vs edited ===== --- 1.35/xen/arch/x86/vmx.c 2005-03-25 08:46:18 -05:00 +++ edited/xen/arch/x86/vmx.c 2005-03-31 13:41:48 -05:00 @@ -294,13 +294,17 @@ vcpu_iodata_t *vio; ioreq_t *p; unsigned long addr; - unsigned long eip; + unsigned long eip, cs, eflags; + int vm86; __vmread(GUEST_EIP, &eip); + __vmread(GUEST_CS_SELECTOR, &cs); + __vmread(GUEST_EFLAGS, &eflags); + vm86 = eflags & X86_EFLAGS_VM ? 1 : 0; VMX_DBG_LOG(DBG_LEVEL_1, - "vmx_io_instruction: eip=%p, exit_qualification = %lx", - eip, exit_qualifica...

...vm86 = 0; +static int vmx_decode(int vm86, unsigned char *opcode, struct instruction *instr) +{ + unsigned char size_reg = 0; unsigned char rex = 0; - unsigned char size_reg = 0; + int index; init_instruction(instr); opcode = check_prefix(opcode, instr, &rex); - - __vmread(GUEST_RFLAGS, &eflags); - if (eflags & X86_EFLAGS_VM) - vm86 = 1; if (vm86) { /* meaning is reversed */ if (instr->op_size == WORD) @@ -636,7 +631,6 @@ struct vcpu *v = current; vcpu_iodata_t *vio; ioreq_t *p; - int vm86; struct cpu_user_r...

Changes from v1 to v2: - Use a macro to replace the hardcode in patch 1/3. This patchset fixes issues about IA32_VMX_MISC MSR emulation, VMCS guest area synchronization about PAGE_FAULT_ERROR_CODE_MASK/PAGE_FAULT_ERROR_CODE_MATCH, and CR0/CR4 emulation. Please help to review and pull. Thanks, Dongxiao Dongxiao Xu (3): nested vmx: emulate IA32_VMX_MISC MSR nested vmx: synchronize page

Hi I am using oprofile 0.9.3 on xen cs 16540 on an Intel system. When I look at the top "hot" functions, I see p2m_change_type being one of the top function in xen-syms. This function is only in the svm (AMD) code and should not appear on an Intel system. I see that this function is not being clled at all when I am running my apps as I have put printk in the functions and they do

...+ if ( (intblk != hvm_intblk_none) && + ( (intack.source == hvm_intsrc_pic) || + ( intack.source == hvm_intsrc_vector) ) ) + { + enable_intr_window(v, intack); + goto out; + } + + if ( __vmread(VM_ENTRY_INTR_INFO) & INTR_INFO_VALID_MASK ) + { + if ( (intack.source == hvm_intsrc_pic) || + (intack.source == hvm_intsrc_nmi) || + (intack.source == hvm_intsrc_mce) ) + enable_intr_window(v, intack); + +...

Fix the mistake for debug exception(#DB), overflow exception(#OF; generated by INTO) and int 3(#BP) instruction emulation. For INTn (CD ib), it should use type 4 (software interrupt). For INT3 (CC; NOT CD ib with ib=3) and INTO (CE; NOT CD ib with ib=4), it should use type 6 (software exception). For other exceptions (#DE, #DB, #BR, #UD, #NM, #TS, #NP, #SS, #GP, #PF, #MF, #AC, #MC, and #XM), it

...:14:40.000000000 +0100 @@ -1512,8 +1512,10 @@ static int vmx_msr_read_intercept(struct msr_content = var_range_base[index]; break; case MSR_IA32_DEBUGCTLMSR: - if ( vmx_read_guest_msr(v, ecx, &msr_content) != 0 ) - msr_content = 0; + msr_content = __vmread(GUEST_IA32_DEBUGCTL); +#ifdef __i386__ + msr_content |= (u64)__vmread(GUEST_IA32_DEBUGCTL_HIGH) << 32; +#endif break; case MSR_IA32_VMX_BASIC...MSR_IA32_VMX_PROCBASED_CTLS2: goto gp_fault; @@ -1732,11 +1734,15 @@ static int vmx_msr_write_intercept(struc...

...Signed-Off-By: Arun Sharma <arun.sharma@intel.com> diff -Nru a/xen/include/asm-x86/vmx.h b/xen/include/asm-x86/vmx.h --- a/xen/include/asm-x86/vmx.h 2005-04-18 16:49:37 -07:00 +++ b/xen/include/asm-x86/vmx.h 2005-04-18 16:49:37 -07:00 @@ -194,7 +194,7 @@ return 0; } -static inline int __vmread (unsigned int field, void *value) +static inline int __vmread (unsigned long field, void *value) { unsigned long eflags; unsigned long ecx = 0; @@ -213,7 +213,7 @@ return 0; } -static inline int __vmwrite (unsigned int field, unsigned int value) +static inline int __vmwrite (unsi...

...id) return cpu_has_vmx_virtual_intr_delivery; } +static void vmx_process_isr(int isr, struct vcpu *v) +{ + unsigned long status; + u8 old; + + if ( !cpu_has_vmx_virtual_intr_delivery ) + return; + + if (isr < 0) + isr = 0; + + vmx_vmcs_enter(v); + status = __vmread(GUEST_INTR_STATUS); + old = status >> VMX_GUEST_INTR_STATUS_SVI_OFFSET; + if (isr != old) { + status &= VMX_GUEST_INTR_STATUS_SUBFIELD_BITMASK; + status |= isr << VMX_GUEST_INTR_STATUS_SVI_OFFSET; + __vmwrite(GUEST_INTR_STATUS, status); + } + vmx_vmc...

Currently, Xen does not support injecting an NMI to HVM guest OS. Adding this feature is necessary for those softwares which depend on NMI to function correctly, such as KDB and oprofile. The attached patch allows NMI to be injected to guest OS in NMIP capable platforms. It also enables to queue an NMI and then inject it as soon as possible. Signed-off-by: Haitao Shan

Hi all, Can Xen hypervisor modify HVM domU's Shadow page table, under the dom0's context, like trapped from dom0's hypercall? I think it have to call 2 functions at least: guest_walk_tables() and flush_tlb_all(). Can these 2 functions called in dom0's context? In my test, if hypervisor tries to modify HVM's shadow page table, it will bring down the whole system. I am not

Changes from v2 to v3: - Use pfn_to_paddr() to get the address from frame number instead of doing shift directly. - Remove some unnecessary initialization code and add "static" to vmentry_fields and gpdptr_fields. - Enable the VMREAD/VMWRITE bitmap only if nested hvm is enabled. - Use clear_page() to set all 0 to the page instead of memset(). - Use domheap to allocate the

...lt;thomas.woller@amd.com> Please apply to xen-unstable.hg. hvm_xenoprofile_3.patch - The third patch adds the actual xenoprofile fixes for VT: I checked (verified by Renato), that the VT traces look ok also. There is some code that I am unsure about in the vmx_oprofile_get_eip(): i.e using the __vmread() to get eip might not be in the proper context, and then secondly I am not sure how to determine the guest CPL level. Tom _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

...struct segment_register *reg) +void vmx_get_segment_register(struct vcpu *v, enum x86_segment seg, + struct segment_register *reg) { uint32_t attr = 0; @@ -1461,11 +1461,6 @@ static int vmx_event_pending(struct vcpu return (__vmread(VM_ENTRY_INTR_INFO) & INTR_INFO_VALID_MASK); } -static int vmx_do_pmu_interrupt(struct cpu_user_regs *regs) -{ - return vpmu_do_interrupt(regs); -} - static void vmx_set_uc_mode(struct vcpu *v) { if ( paging_mode_hap(v->domain) ) @@ -1527,7 +1522,6 @@ static struct hvm_function_...

...checked during NMI processing via the hvm function callback. hvm_xenoprofile_3.patch - The third patch adds the actual xenoprofile fixes for VT: I checked (verified by Renato), that the VT traces look ok also. There is some code that I am unsure about in the vmx_oprofile_get_eip(): i.e using the __vmread() to get eip might not be in the proper context, and then secondly I am not sure how to determine the guest CPL level. Overall, these patches seem to work fine for 32bit hypervisor, as well as 64bit hypervisor with 32bit and 64bit HVM guests. You do need to use both of Renato''s oprofile...

Changes from v1: - Define new struct hvm_trap to represent information of trap, include instruction length. - Renames hvm_inject_exception to hvm_inject_trap. Then define a couple of wrappers around that function for existing callers, so that their parameter lists actually *shrink*. This series of patches fix the mistake for debug exception(#DB), overflow exception(#OF) and INT3(#BP),

This patch series is a reworking of a series developed by Mukesh Rathor at Oracle. The entirety of the design and development was done by him; I have only reworked, reorganized, and simplified things in a way that I think makes more sense. The vast majority of the credit for this effort therefore goes to him. This version is labelled v13 because it is based on his most recent series, v11.

about VIRQ &amp; PIRQ what is VIRQ  ?How VIRQ is different from PIRQ ?How VIRQ &amp; PIRQ are related each other ? DISCLAIMER: ----------------------------------------------------------------------------------------------------------------------- The contents of this e-mail and any attachment(s) are confidential and intended for the named recipient(s) only. It shall not attach any