Displaying 13 results from an estimated 13 matches for "__tile_loadd".
2020 Aug 14
6
Intel AMX programming model discussion.
...The user interface looks as this.
3 #define __DEFAULT_FN_AMX \
4 __attribute__((__always_inline__, __nodebug__, __target__("amx-int8")))
9 typedef struct __tile_str {
10 const char row;
11 const short col;
12 _tile_data tile;
13 }__tile;
14
15 __DEFAULT_FN_AMX
16 void __tile_loadd(__tile *dst, const void *base, long stride) {
17 dst->tile = _tile_loadd_internal(dst->row, dst->col, base, stride);
18 }
19
20 __DEFAULT_FN_AMX
21 void __tile_dpbsud(__tile *dst, __tile src1, __tile src2) {
22 dst->tile = _tile_dpbssd_internal(src1.row, src2.col, src1.col, dst->...
2020 Aug 14
3
Intel AMX programming model discussion.
...The user interface looks as this.
3 #define __DEFAULT_FN_AMX \
4 __attribute__((__always_inline__, __nodebug__, __target__("amx-int8")))
9 typedef struct __tile_str {
10 const char row;
11 const short col;
12 _tile_data tile;
13 }__tile;
14
15 __DEFAULT_FN_AMX
16 void __tile_loadd(__tile *dst, const void *base, long stride) {
17 dst->tile = _tile_loadd_internal(dst->row, dst->col, base, stride);
18 }
19
20 __DEFAULT_FN_AMX
21 void __tile_dpbsud(__tile *dst, __tile src1, __tile src2) {
22 dst->tile = _tile_dpbssd_internal(src1.row, src2.col, src1.col, dst->...
2020 Aug 18
2
Intel AMX programming model discussion.
...The user interface looks as this.
3 #define __DEFAULT_FN_AMX \
4 __attribute__((__always_inline__, __nodebug__, __target__("amx-int8")))
9 typedef struct __tile_str {
10 const char row;
11 const short col;
12 _tile_data tile;
13 }__tile;
14
15 __DEFAULT_FN_AMX
16 void __tile_loadd(__tile *dst, const void *base, long stride) {
17 dst->tile = _tile_loadd_internal(dst->row, dst->col, base, stride);
18 }
19
20 __DEFAULT_FN_AMX
21 void __tile_dpbsud(__tile *dst, __tile src1, __tile src2) {
22 dst->tile = _tile_dpbssd_internal(src1.row, src2.col, src1.col, dst->...
2020 Aug 19
2
Intel AMX programming model discussion.
...The user interface looks as this.
3 #define __DEFAULT_FN_AMX \
4 __attribute__((__always_inline__, __nodebug__, __target__("amx-int8")))
9 typedef struct __tile_str {
10 const char row;
11 const short col;
12 _tile_data tile;
13 }__tile;
14
15 __DEFAULT_FN_AMX
16 void __tile_loadd(__tile *dst, const void *base, long stride) {
17 dst->tile = _tile_loadd_internal(dst->row, dst->col, base, stride);
18 }
19
20 __DEFAULT_FN_AMX
21 void __tile_dpbsud(__tile *dst, __tile src1, __tile src2) {
22 dst->tile = _tile_dpbssd_internal(src1.row, src2.col, src1.col, dst->...
2020 Aug 19
3
Intel AMX programming model discussion.
...The user interface looks as this.
3 #define __DEFAULT_FN_AMX \
4 __attribute__((__always_inline__, __nodebug__, __target__("amx-int8")))
9 typedef struct __tile_str {
10 const char row;
11 const short col;
12 _tile_data tile;
13 }__tile;
14
15 __DEFAULT_FN_AMX
16 void __tile_loadd(__tile *dst, const void *base, long stride) {
17 dst->tile = _tile_loadd_internal(dst->row, dst->col, base, stride);
18 }
19
20 __DEFAULT_FN_AMX
21 void __tile_dpbsud(__tile *dst, __tile src1, __tile src2) {
22 dst->tile = _tile_dpbssd_internal(src1.row, src2.col, src1.col, dst->...
2020 Aug 15
2
Intel AMX programming model discussion.
...The user interface looks as this.
3 #define __DEFAULT_FN_AMX \
4 __attribute__((__always_inline__, __nodebug__, __target__("amx-int8")))
9 typedef struct __tile_str {
10 const char row;
11 const short col;
12 _tile_data tile;
13 }__tile;
14
15 __DEFAULT_FN_AMX
16 void __tile_loadd(__tile *dst, const void *base, long stride) {
17 dst->tile = _tile_loadd_internal(dst->row, dst->col, base, stride);
18 }
19
20 __DEFAULT_FN_AMX
21 void __tile_dpbsud(__tile *dst, __tile src1, __tile src2) {
22 dst->tile = _tile_dpbssd_internal(src1.row, src2.col, src1.col, dst->...
2020 Sep 04
2
Intel AMX programming model discussion.
...nknown. Do you have any advice for such problem?
52 void kernel(int cond) {
53 _tile a = {row, 8};
54 _tile b = {8, col};
55
56 // copy shape to stack slot
57 // ldtilecfg a, b, c
58 if(cond) {
59 short row = get_row();
60 short col = get_row();
61 _tile c = {row, col};
62 __tile_loadd(&a, buf, STRIDE);
63 __tile_loadd(&b, buf, STRIDE);
64 __tile_loadd(&c, buf, STRIDE);
65 } else {
66 short row = get_row();
67 short col = get_row();
68 _tile c = {row, col};
69 __tile_loadd(&a, buf2, STRIDE);
70 __tile_loadd(&b, buf2, STRIDE);
71...
2020 Aug 19
2
Intel AMX programming model discussion.
...The user interface looks as this.
3 #define __DEFAULT_FN_AMX \
4 __attribute__((__always_inline__, __nodebug__, __target__("amx-int8")))
9 typedef struct __tile_str {
10 const char row;
11 const short col;
12 _tile_data tile;
13 }__tile;
14
15 __DEFAULT_FN_AMX
16 void __tile_loadd(__tile *dst, const void *base, long stride) {
17 dst->tile = _tile_loadd_internal(dst->row, dst->col, base, stride);
18 }
19
20 __DEFAULT_FN_AMX
21 void __tile_dpbsud(__tile *dst, __tile src1, __tile src2) {
22 dst->tile = _tile_dpbssd_internal(src1.row, src2.col, src1.col, dst->...
2020 Aug 14
2
Intel AMX programming model discussion.
...icient as passing through memory. Compiler allocate the tile register and configure it in callee, and the tile register is re-configured in callee and all the tile data register is clear to zero. So yes, this force everything to be spilled and restored from the stack.
14
15 __DEFAULT_FN_AMX
16 void __tile_loadd(__tile *dst, const void *base, long stride) {
17 dst->tile = _tile_loadd_internal(dst->row, dst->col, base, stride);
18 }
19
20 __DEFAULT_FN_AMX
21 void __tile_dpbsud(__tile *dst, __tile src1, __tile src2) {
22 dst->tile = _tile_dpbssd_internal(src1.row, src2.col, src1.col, dst->...
2020 Aug 19
3
Intel AMX programming model discussion.
...The user interface looks as this.
3 #define __DEFAULT_FN_AMX \
4 __attribute__((__always_inline__, __nodebug__, __target__("amx-int8")))
9 typedef struct __tile_str {
10 const char row;
11 const short col;
12 _tile_data tile;
13 }__tile;
14
15 __DEFAULT_FN_AMX
16 void __tile_loadd(__tile *dst, const void *base, long stride) {
17 dst->tile = _tile_loadd_internal(dst->row, dst->col, base, stride);
18 }
19
20 __DEFAULT_FN_AMX
21 void __tile_dpbsud(__tile *dst, __tile src1, __tile src2) {
22 dst->tile = _tile_dpbssd_internal(src1.row, src2.col, src1.col, dst->...
2020 Sep 04
2
Intel AMX programming model discussion.
On 9/4/20 3:37 AM, Luo, Yuanke wrote:
>
> Hi Hal,
>
> Thank you for the ideas that help us to improve the design, and sorry
> for replying late. There is something I am not able to figure out and
> there some special trait for tile RA.
>
You're quite welcome.
> 1.X86RegisterInfo::getRegAllocationHints can tell RA which physical
> register is preferred, but it
2020 Aug 20
1
Intel AMX programming model discussion.
...11 const short col;
>
> 12 _tile_data tile;
>
> 13 }__tile;
>
> 14
>
> 15 __DEFAULT_FN_AMX
>
> 16 void __tile_loadd(__tile *dst, const
> void *base, long stride) {
>
> 17 dst->tile =
> _tile_loadd_internal(dst->row, dst->col,
> base, stride);
>
>...
2020 Aug 21
2
Intel AMX programming model discussion.
...The user interface looks as this.
3 #define __DEFAULT_FN_AMX \
4 __attribute__((__always_inline__, __nodebug__, __target__("amx-int8")))
9 typedef struct __tile_str {
10 const char row;
11 const short col;
12 _tile_data tile;
13 }__tile;
14
15 __DEFAULT_FN_AMX
16 void __tile_loadd(__tile *dst, const void *base, long stride) {
17 dst->tile = _tile_loadd_internal(dst->row, dst->col, base, stride);
18 }
19
20 __DEFAULT_FN_AMX
21 void __tile_dpbsud(__tile *dst, __tile src1, __tile src2) {
22 dst->tile = _tile_dpbssd_internal(src1.row, src2.col, src1.col, dst->...