Displaying 3 results from an estimated 3 matches for "__sync_fetch_and_or".
2007 Jul 12
0
[LLVMdev] Atomic Operation and Synchronization Proposal v2
...rs
assuming that they are implicit for anything that carries any reordering
constraint.
I would guess that with the second approach (constraints for operations),
codegen implementations could be actually easier because you can
concentrate on just one operation with constraints.
> result = __sync_fetch_and_or( <ty>* ptr, <ty> value )
or/and/... should be added to the list of supported intrinsics at some time.
x86 has built-in support for that and doesn't need the CAS loop.
Torvald
2007 Jul 12
4
[LLVMdev] Atomic Operation and Synchronization Proposal v2
Hello,
This is the second major revision of the atomic proposal for LLVM. I
will try and give a brief overview of the motivating changes, but a
greater portion of the text has changed, along with some changes to
the proposed additions.
http://chandlerc.net/llvm_atomics.html
- The proposal has been rewritten to better delineate the goals and
purposes of LLVM, and these additions to LLVM. The why
2007 Jul 12
1
[LLVMdev] Atomic Operation and Synchronization Proposal v2
...ate on just one operation with constraints.
As stated above, this assumes that all architectures work this way,
which they simply do not. This is a hardware interface, and as such
follows the hardware. As such, the codegen will not be easier or
harder in either of these cases.
> > result = __sync_fetch_and_or( <ty>* ptr, <ty> value )
>
> or/and/... should be added to the list of supported intrinsics at some time.
> x86 has built-in support for that and doesn't need the CAS loop.
It doesn't have built-in support. These are "fetch and *" operations.
x86 has support...