search for: __spir_sizet_cmp

...gt; > > > %2 = call %spir.size_t @__spir_sizet_convert_size_t(i64 8) > > > > %3 = call %spir.size_t @__spir_sizet_neg(%spir.size_t %2) > > > > %4 = call %spir.size_t @__spir_sizet_add(%spir.size_t %1, > %spir.size_t %3) > > > > %5 = call %spir.size_t @__spir_sizet_cmp(%spir.size_t %4, > %spir.size_t %0) > > > > %6 = call i1 %spir.size_t @__spir_size_t_convert_i1(%spir.size_t %5) > > This conversion simply isn't correct: the type of the comparison is > not size_t if size_t is 32 bits. [Villmow, Micah] Sorry, the result of sizet_cmp is...

...%spir.size_t @__spir_sizet_convert_size_t(i64 8) >> > >> > %3 = call %spir.size_t @__spir_sizet_neg(%spir.size_t %2) >> > >> > %4 = call %spir.size_t @__spir_sizet_add(%spir.size_t %1, >> %spir.size_t %3) >> > >> > %5 = call %spir.size_t @__spir_sizet_cmp(%spir.size_t %4, >> %spir.size_t %0) >> > >> > %6 = call i1 %spir.size_t @__spir_size_t_convert_i1(%spir.size_t %5) >> >> This conversion simply isn't correct: the type of the comparison is >> not size_t if size_t is 32 bits. > [Villmow, Micah] Sorry...

....size_t @__spir_sizet_convert_size_t(i32 4) > > %2 = call %spir.size_t @__spir_sizet_convert_size_t(i64 8) > > %3 = call %spir.size_t @__spir_sizet_neg(%spir.size_t %2) > > %4 = call %spir.size_t @__spir_sizet_add(%spir.size_t %1, %spir.size_t %3) > > %5 = call %spir.size_t @__spir_sizet_cmp(%spir.size_t %4, %spir.size_t %0) > > %6 = call i1 %spir.size_t @__spir_size_t_convert_i1(%spir.size_t %5) This conversion simply isn't correct: the type of the comparison is not size_t if size_t is 32 bits. -Eli

...et_convert_size_t(i32 0) %1 = call %spir.size_t @__spir_sizet_convert_size_t(i32 4) %2 = call %spir.size_t @__spir_sizet_convert_size_t(i64 8) %3 = call %spir.size_t @__spir_sizet_neg(%spir.size_t %2) %4 = call %spir.size_t @__spir_sizet_add(%spir.size_t %1, %spir.size_t %3) %5 = call %spir.size_t @__spir_sizet_cmp(%spir.size_t %4, %spir.size_t %0) %6 = call i1 %spir.size_t @__spir_size_t_convert_i1(%spir.size_t %5) While this is very verbose, it is possible to handle it correctly. Once you lower the SPIR to LLVMIR and run some basic optimizations, then resulting IR should be equivalent as if were generating...

On Wed, Sep 12, 2012 at 3:26 PM, Villmow, Micah <Micah.Villmow at amd.com>wrote: > > > > -----Original Message----- > > From: Eli Friedman [mailto:eli.friedman at gmail.com] > > Sent: Wednesday, September 12, 2012 3:22 PM > > To: Villmow, Micah > > Cc: Richard Smith; cfe-dev at cs.uiuc.edu; llvmdev at cs.uiuc.edu > > Subject: Re: [cfe-dev] [LLVMdev]

> -----Original Message----- > From: Eli Friedman [mailto:eli.friedman at gmail.com] > Sent: Wednesday, September 12, 2012 3:22 PM > To: Villmow, Micah > Cc: Richard Smith; cfe-dev at cs.uiuc.edu; llvmdev at cs.uiuc.edu > Subject: Re: [cfe-dev] [LLVMdev] SPIR Portability Discussion > > On Wed, Sep 12, 2012 at 2:58 PM, Villmow, Micah <Micah.Villmow at amd.com> >