search for: __llvm_slsblr_thunk_x

...ural execution path, performance overhead of this is expected to be low. The gist of the mitigation for the BLR instruction is a bit more complicated, to make sure that no barrier gets placed on the architectural execution path. In summary, a BLR x<N> instruction gets transformed to BL __llvm_slsblr_thunk_x<N> instruction, with __llvm_slsblr_thunk_x<N> a thunk that contains __llvm_slsblr_thunk_x<N>: BR x<N> speculation barrier Therefore, the BLR instruction gets split into 2; one BL and one BR. This transformation results in not inserting a speculation barrier on the arc...